Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2007-03-27
2007-03-27
Mai, Tan V. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S553000
Reexamination Certificate
active
10389655
ABSTRACT:
A system and method of improving signal to noise ration (SNR) in a fixed point fast Fourier transform (FFT/IFFT) generates from sample inputs and a twiddle factor butterfly outputs for each stage; scales the butterfly outputs of this stage from a predicted normalization scale factor to obtain the maximum butterfly output without overflow from this stage; determines from the butterfly outputs of this stage the minimum normalizing exponent for the butterfly outputs of this stage and predicts a normalization scale factor of the next stage from the minimum normalizing exponent of this stage and a stage guard scale value to obtain the maximum butterfly output without overflow from that next stage.
REFERENCES:
patent: 3746848 (1973-07-01), Clary
patent: 4407018 (1983-09-01), Kanemasa
patent: 4501149 (1985-02-01), Konno et al.
Primo Haim
Stein Yosef
Analog Devices Inc.
Iandiorio & Teska
Mai Tan V.
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