Method and system for fast synchronization multiframe...

Details Method and system for fast synchronization multiframe... Method and system for fast synchronization multiframe...

2005-08-09

2005-08-09

Liu, Shuwang (Department: 2634)

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

C375S346000, C375S357000, C370S514000, C370S376000, C370S517000

Reexamination Certificate

active

06928124

ABSTRACT:
The invention describes a method and a system for fast and economic synchronization of multiframe structures, such as PDH multiframe binary signals, by detecting a periodic binary signature in a binary signal using one final state machine (FSM) comprising a logical scheme interconnected with a memory block having a plurality of independent memory cells with serial numbers for cyclically connecting thereof to the logical scheme; the signature is detected by applying the signal to the FSM while synchronously switching the cells to the FSM. The arrangement is such that when the predetermined periodic binary signature occurs in the signal, one of the cells will reach its predetermined terminal state.

REFERENCES:
patent: 5734687 (1998-03-01), Kainulainen
patent: 5841779 (1998-11-01), Kainulainen
patent: 6654368 (2003-11-01), Smith et al.
patent: 2002/0090009 (2002-07-01), Yehuda et al.
International Telecommunication Union, General Aspects of Digital Transmission Systems; Terminal Equipments, Frame Alignment and Cyclic Redundancy Check (CRC) Procedures Relating to Basic Frame Structures Defined in Recommendation G.704, (1991).
International Telecommunication Union, General Aspects of Digital Transmission Systems; Synchronous Frame Structures USED at 1544, 6312, 2048, 8488 and 44 736 kbit/s Hierarchical Levels (1995).

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