Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2005-06-28
2005-06-28
Nelms, David (Department: 2818)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S230040, C365S230060, C365S230080, C365S233100, C365S189040
Reexamination Certificate
active
06912173
ABSTRACT:
An address device simultaneously provides a first address to a first memory section using a first address bus and a second, incrementally higher, address to a second memory section using a second address bus. A buffer can then read from or write to the first and second memory sections. During a read operation, the buffer can receive a first portion of a misaligned data word from the first memory section and read a second portion of the misaligned data word from the second memory section and assemble the data in the data word from the first and second portions. When the access operation is a write operation, the buffer can effectively perform a shift operation on the data in the data word, then write a first portion of the word to the first memory section and write a second portion of the word to the second memory section. Accordingly, data accesses that would take two memory-access cycles on a conventional memory system are reduced to a single memory-access cycle.
REFERENCES:
patent: 3440615 (1969-04-01), Carter
patent: 4595911 (1986-06-01), Kregness et al.
patent: 4961162 (1990-10-01), Nguyenphu et al.
patent: 5553263 (1996-09-01), Kalish et al.
patent: 5748555 (1998-05-01), Park
patent: 5802387 (1998-09-01), Boddie et al.
patent: 6065070 (2000-05-01), Johnson
patent: 6076136 (2000-06-01), Burroughs et al.
patent: 6115805 (2000-09-01), Rhodes et al.
patent: 6138214 (2000-10-01), Pfefferl
patent: 6148386 (2000-11-01), Rhodes et al.
patent: 6205536 (2001-03-01), Yoshida
patent: 6230238 (2001-05-01), Langan et al.
patent: 6282623 (2001-08-01), Halahmi et al.
patent: 6462998 (2002-10-01), Proebsting
patent: 6754780 (2004-06-01), Carlson et al.
patent: 6789179 (2004-09-01), Beat
patent: 2001/0016898 (2001-08-01), Ito et al.
patent: 2002/0095426 (2002-07-01), Ishida et al.
patent: 2003/0037190 (2003-02-01), Alexander et al.
Pham Ly Duy
Sterne Kessler Goldstein & Fox P.L.L.C.
LandOfFree
Method and system for fast memory access does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for fast memory access, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for fast memory access will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3493228