Method and system for fast ethernet serial port multiplexing...

Multiplex communications – Communication techniques for information carried in plural... – Adaptive

Reexamination Certificate

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C370S535000, C370S537000

Reexamination Certificate

active

06980563

ABSTRACT:
A system and method of reducing the input and output pins used to interface a fast serial port Ethernet processing system using multiplexing. Using the system of the present invention, four pins can allow a plurality of Ethernet communication paths to be connected to a single processor on a substrate. These four connections include a clocking input as well as a strobe signal which coordinates the multiplexing and identifies the time period for a predetermined source. The physical layer and the processor are each provided with a multiplexor which is controlled by the strobe to select the network to be coupled at any given time. The multiplexor includes a counter which is incremented by the clocking input and reset by the strobe signal.

REFERENCES:
patent: 4731785 (1988-03-01), Ferenc et al.
patent: 4873663 (1989-10-01), Baranyai et al.
patent: 6385208 (2002-05-01), Findlater et al.
patent: 6651107 (2003-11-01), Conley et al.
patent: 6795881 (2004-09-01), Bachrach

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