Method and system for encoding

Television – Bandwidth reduction system – Data rate reduction

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348405, 36472503, H04N 730

Patent

active

059460393

ABSTRACT:
An encoding system (400) receives samples and coefficients from a bus (422). The system comprises a plurality of parallel operating memory devices (430-k), registers (435-k), computing units (440-k), and accumulator units (460-k). The system (400) further comprises a parallel-to-serial buffer (470) coupled to the accumulator units (440-k) and a pair generator (480) for providing amplitude/index pairs. The system (400) performs encoding steps such as transforming, quantizing, zigzagging, rate controlling, and run-length coding. Transforming is explained for the example of a Forward Discrete Cosine Transformation (FDCT). According to a method (500) of the present invention, zigzagging (510) occurs prior to transforming (570) and performed only once when transformation coefficients are provided to the memory devices (430-k) in a zigzag arrangement. Quantizing occurs prior to transforming by pre-calculating the coefficients with quantizers. Pair generator (480) performes rate-controlling and run-length encoding (550). (with reference to FIGS. 2 and 9)

REFERENCES:
patent: 5764533 (1998-06-01), Hong
G. K. Wallace, "The JPEG still picture compression standard", IEEE Transactions on Consumer Electronics, vol. 38, No. 1, Feb. 1992, pp. XVIII-XXXIV.
P. Pirsch, W. Gehrke, "VLSI Architectures for video signal processing", Image Processing and its applications, 4-6, Jul. 1995, Conference Publication No. 410, IEE 1995, pp. 6-10.

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