Method and system for efficient, multiplication-free arithmetic

Coded data generation or conversion – Digital code to digital code converters – To or from code based on probability

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H03M 730

Patent

active

054185327

ABSTRACT:
Method and system are provided for efficient, multiplication-free arithmetic coding wherein data which represents an alphabet of source symbols is compressed and decompressed in a data transmission system. Multiplications are replaced with single shift-and-add operation using a suitable shift register wherein a multiplier has at most two bits. The shift-and-add operation approximates the width of a new subinterval within a predetermined interval. This approximation is a function of both the width of a current subinterval and a total count of source symbols in a statistical source model. In this way, an adaptive model can be accommodated as well as a fixed model for the statistics of the source symbols. In one embodiment, the multiplier is preferably determined by a table look-up having a small number of entries and which can be easily implemented by hardware or software.

REFERENCES:
patent: 4652856 (1987-03-01), Mohiuddin et al.
patent: 4989000 (1991-01-01), Chevion et al.

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