Method and system for efficient memory management in a data proc

Details Method and system for efficient memory management in a data proc Method and system for efficient memory management in a data proc

1995-02-10

1998-02-03

Lane, Jack A.

395412, 395413, 395415, 395417, 395418, 395490, 395491, G06F 1200, G06F 1210, G06F 1214

Patent

active

057154201

ABSTRACT:
A method and system for efficient memory management in a data processing system which utilizes a memory management unit to translate effective addresses into real addresses within a translation lookaside buffer is disclosed. During a first mode of operation a selected number of effective address identifiers are stored in the translation lookaside buffer. In association with each virtual address identifier is a corresponding real address entry for a single memory block wherein selected virtual addresses may be translated into corresponding real addresses utilizing the translation lookaside buffer. In a second mode of operation, a selected number of virtual address identifiers are stored in a translation lookaside buffer and each virtual address identifier has a number of protection bits stored in association therewith, wherein each protection bit is indicative of a protection status for a large number of contiguous memory blocks beginning with the associated virtual address identifier, wherein memory block protection may be provided for a large number of memory blocks utilizing a fixed size translation lookaside buffer.

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