Boots – shoes – and leggings
Patent
1993-01-29
1998-12-08
Dowler, Alyssa H.
Boots, shoes, and leggings
395403, 395468, 395551, 364134, 364DIG1, G06F 1300
Patent
active
058482830
ABSTRACT:
A method and system are efficiently maintaining data coherency in a multiprocessor data processing system having multiple processors coupled together via common bus. Each time an attempted modification is made to selected data by one of the processors, a multistate bus synchronization flag is established within the initiating processor. A bus operation request which is appropriate for the type of data modification is then issued from a cache associated with the initiating processor to a memory queue associated therewith. The bus operation request is then transmitted onto the common bus from the memory queue on an opportunistic basis, permitting additional cache operations to occur during the pendency of the bus operation request. A successful assertion of the bus operation request, indicating no coherency problems exist with respect to other processors, results in an alteration of the state of the multistate bus synchronization flag, permitting modification of the selected data. A failure to successfully assert the bus operation request will result in the automatic reissue of the bus operation request, greatly enhancing the ability of the system to maintain data coherency.
REFERENCES:
patent: 4843542 (1989-06-01), Dashiell et al.
patent: 5148533 (1992-09-01), Joyce et al.
patent: 5193186 (1993-03-01), Tamaki et al.
patent: 5210848 (1993-05-01), Liu
patent: 5222229 (1993-06-01), Fukuda et al.
patent: 5228134 (1993-07-01), MacWilliams et al.
patent: 5276828 (1994-01-01), Dion
patent: 5276852 (1994-01-01), Callander et al.
patent: 5301298 (1994-04-01), Kagan et al.
Dubois et al., "Synchronization, Coherence, and Event Ordering in Multiprocessors", IEEE 1988, pp. 9-21.
Lee et al., "Synchronization With Multiprocessor Caches", IEEE Aug. 1990, pp. 27-37.
Yang et al., Analysis and Comparison of Cache Coherence Protocols for a Packet-Switched Multiprocessor, IEEE, 1989 pp. 1143-1153.
Michael Dubois, et al., "Delayed Consistency and Its Effects on the Miss Rate of Parallel Programs", Proceedings Supercomputing, Nov. 18, 1991, pp. 197-206.
Moore Charles Roberts
Muhich John Stephen
Vicknair Brian James
Dillon Andrew J.
Dowler Alyssa H.
International Business Machines - Corporation
Nguyen Dzung C.
LandOfFree
Method and system for efficient maintenance of data coherency in does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for efficient maintenance of data coherency in, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for efficient maintenance of data coherency in will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-189110