Method and system for dynamically reconfiguring a register file

Details Method and system for dynamically reconfiguring a register file Method and system for dynamically reconfiguring a register file

1994-09-28

1996-04-30

Coleman, Eric

Boots, shoes, and leggings

3642319, 3642474, 36493151, 36493103, 364DIG1, G06F 1716

Patent

active

055133665

ABSTRACT:
A controller is coupled to a plurality of registers arranged in an array having a physical configuration of N rows of registers and M columns of registers. A size register within the controller is provided for receiving a selected vector size parameter, which specifies a number of registers comprising a vector register. In response to the vector size parameter, columns in the register array are selected and concatenated to form a vector register having at least a number of registers equal to the vector size parameter. An offset parameter may be utilized to select columns that form a vector register from the M number of columns in the array. Multiple arithmetic logic units, where one arithmetic logic unit is coupled to each row of registers are utilized to perform vector operations. Any register in the array may be utilized to store a vector element or a scalar expression. Vector register lengths, and the number of vector registers, may be dynamically configured by setting the vector size parameter and the offset parameter in the controller.

REFERENCES:
patent: 4771380 (1988-09-01), Kris
patent: 5073970 (1991-12-01), Aoyama
patent: 5170370 (1992-12-01), Lee
patent: 5226135 (1993-07-01), Mishina
patent: 5463577 (1995-10-01), Oowaki

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