Method and system for displaying an analog image by a...

Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source

Reissue Patent

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C345S204000, C345S211000, C345S212000, C345S501000, C348S512000, C348S537000

Reissue Patent

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RE042615

ABSTRACT:
delete-start id="REI-00001" date="20110816" ?A clock recovery circuit in a digital display unit for recovering a time reference signal associated with analog display data. The clock recovery circuit includes a phase-locked loop (PLL) implemented in digital domain and an analog filter to eliminate any undesirable frequencies from the output signal of the PLL. The PLL includes independent control loops to track long term frequency drifts of the time reference signal and the transient phase differences respectively. By providing such independent control loops, the generated clock can be better synchronized with the time reference signal.delete-end id="REI-00001" ?insert-start id="REI-00002" date="20110816" ?Scaling a source image formed of a number of source image elements to provide a destination image formed of a number of destination image elements using a line buffer and no frame buffer.insert-end id="REI-00002" ?

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