Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2005-10-18
2005-10-18
Ngo, Chuong D (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C710S040000
Reexamination Certificate
active
06957238
ABSTRACT:
The present invention provides a method and system to select a valid entry in a deterministic pseudo-random approach. The method may randomly select one of numerous valid entries in order to ensure that no specific entry or set of entries is consistently ignored. Moreover, the method may be deterministic in order that the selection technique could be precisely controlled for purposes such as testing and predetermined selection. The method of the present invention may be carried out in five parts: first, the total range of entries is divided into regions, each of which is further divided into one or more sub-regions; pre-determined or constantly-changing weighting is assigned to each region in the second step; an OR operation is then performed on the entries of each sub-region to determine which of the sub-regions, if any, contains no valid entries and thus may be disregarded in the final step; the weightings assigned in step two are examined in order to select a sub-region from a region where more than one sub-region contains valid entries. Furthermore, the final step combines the original entry's signal with the appropriate collection of ignore signals, and effectively selects one entry as the final output.
REFERENCES:
patent: 5091874 (1992-02-01), Watanabe et al.
patent: 5504697 (1996-04-01), Ishida
patent: 5881313 (1999-03-01), Ramakrishnan et al.
patent: 5974432 (1999-10-01), Orup
patent: 6195673 (2001-02-01), Park
Altera Corporation
Martine & Penilla & Gencarella LLP
Ngo Chuong D
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