Method and system for detecting defects on a printed circuit...

Image analysis – Applications – Manufacturing or product inspection

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C382S147000

Reexamination Certificate

active

06771807

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to inspection systems and to methods for detecting defects on electronic circuits such as printed circuit boards. More specifically, the present invention is concerned with such systems and methods based on edge detection.
BACKGROUND OF THE INVENTION
Electronic circuits may take many forms, such as PCB (Printed Circuit Boards), lead frames, and hybrid circuits. These circuits usually include a plurality of components, for example conductors, holes, pads, dielectrics, photopolymer resist film, etc. These components may be assembled on layers that are mounted on top of each other. An example of such multi-layer assembly is the well-known conductors-holes-glaze circuit structure. In the following description we will refer to printed circuit boards (PCB) only as an example. However, it is to be understood that the present invention is not limited to that embodiment of electronic circuits.
In the past, inspection of PCBs has been performed visually by a person who would have looked at a circuit, using a magnifier, trying to find differences with an acceptable circuit model. Drawbacks of visual inspections are numerous: subjectivity, slowness, difficulty to collect quantitative information on defects, etc.
Automated methods of inspection have recently emerged following the increase of computer processing speed. Most of those automated methods consist in taking a digital image of the PCB to be inspected and analyzing this digital image to determine the presence of defects. Examples of such automated methods are those based on the detection of edges.
An edge is a segment of a component's contour. It can be visually distinguished on a digital image as variations of hue from one component to the next, assuming that transitions between components (or regions) have optically different characteristics. Edge based detection methods consist in characterizing and analyzing edges on a PCB image and by comparing such edges to known values and criteria.
FIG. 1
of the appended drawings illustrates examples of defects that can be found on a PCB or on other types of electronic circuits. The defects may be, for example, a bad overlap
10
between two layers of the PCB, a misalignment of two layers
12
, a gap too small
14
between two adjacent tracks, a bridge
16
between two components, a track too narrow
18
or a broken track
19
.
An example of an edge-based method for detecting defects on an electronic circuit is described in U.S. Pat. No. 4,570,180, untitled “Method For Automatic Optical Inspection”, issued on Feb. 11, 1986 and naming Baier et al. as inventors. This patent relates to a method and an apparatus for automatic optical inspection of a substantially two-dimensional pattern using digital image processing techniques. The method includes a first step in which grey level digital images are scanned for edges or lines and marking those edges in image storage. Then all non-marked regions in the image storage are scanned and tested for permissible grey levels.
Since anomalies are tested only by comparing non-marked regions to permissible grey levels, a drawback of Baier's method is that the quality of the detection is too dependent on the quality of the digital images. Indeed, the digitized image of an object may present variation in feature sizes and locations depending on the digitizing algorithms, magnification differences, etc.
Another problem of Baier's method is that, approximately the same computing power is required to test all pixels on the digital picture that do not correspond to edges, leading to waste of both computing resources and time.
Still another drawback of Baier's method is that it can be difficult to characterize a detected defect. Such characterization can be useful to find emerging error patterns in the electronic circuit's manufacturing process.
In U.S. Pat. No. 5,452,368 issued on Sep. 19, 1995 and entitled “Method of Detecting Defects In Semiconductor Package Leads”, LeBeau teaches a method for detecting defects in objects by comparing a first grey level image of a first object to a second grey level image of a second object. More precisely, the edge features of the first image are skeletonized and compared to the dilated edge features of the second image and vice versa. Contrary to Baier's method, LeBeau's does not test non-edge-related regions on the digital image.
However, a drawback of LeBeau's method is that defects are searched by comparing two images of objects that can be inflected by very similar defects positioned at about the same place. LeBeau's method does not allow for detection of such defects. This is a major drawback since a faulty manufacturing process can cause such repeated defects.
Accordingly, it is desirable to have a method and a system that allows for the detection of defects on an electronic circuit that does not rely on the quality and resolution of the digitized image of the electronic circuit and that does not interpret grey level variations as defects.
It is also desirable to have a method and a system to detect defects that make use of design data.
It is further desirable to have such methods and systems that provide two levels of inspection, one to detect anomalies and another to inspect these anomalies for defects, helping maximize the processing speed.
SUMMARY OF THE INVENTION
More specifically, in accordance with the present invention, there is provided a method for detecting surface defects on a Printed Circuit Board (PCB) having at least one layer including components, the method comprising:
providing a digital image of the PCB;
identifying edges on the PCB image;
providing a corresponding computer model for each component on at least one layer of the PCB;
detecting anomalies on the PCB image by comparing said identified edges to the computer model; and
for each detected anomalies, determining if the detected anomaly corresponds to a surface defect.
According to another aspect of the present invention, there is provided a system for detecting surface defects on a PCB; the system comprising:
a computer including a model of the PCB and being configured to identify edges on a PCB images, detecting anomalies on the PCB image by comparing the identified edges to the computer model, and for each detected anomaly, determining if the detected anomaly corresponds to a surface defect;
an illumination assembly connected to the computer to provide illumination on the PCB;
a frame grabber connected to the computer;
a camera connected to the frame grabber to take an image of the PCB; and
a positioning system connected to the frame grabber.
It is to be noted that the term “PCB” should be construed herein as any electronic circuit that may include visually distinguishable surface defects.
Other objects, advantages and features of the present invention will become more apparent upon reading of the following non restrictive description of preferred embodiments thereof, given by way of example only with reference to the accompanying drawings.


REFERENCES:
patent: 4570180 (1986-02-01), Baier et al.
patent: 4578810 (1986-03-01), MacFarlane et al.
patent: 4589140 (1986-05-01), Bishop et al.
patent: 4654583 (1987-03-01), Ninomiya et al.
patent: 4776022 (1988-10-01), Fox et al.
patent: 4791586 (1988-12-01), Maeda et al.
patent: 4799175 (1989-01-01), Sano et al.
patent: 4894790 (1990-01-01), Yotsuya et al.
patent: 4974261 (1990-11-01), Nakahara et al.
patent: 5054094 (1991-10-01), Barski
patent: 5086477 (1992-02-01), Yu et al.
patent: 5115475 (1992-05-01), Lebeau
patent: 5119434 (1992-06-01), Bishop et al.
patent: 5272763 (1993-12-01), Maruyama et al.
patent: 5365596 (1994-11-01), Dante et al.
patent: 5452368 (1995-09-01), LeBeau
patent: 5455870 (1995-10-01), Sepai et al.
patent: 5483603 (1996-01-01), Luke et al.
patent: 5506793 (1996-04-01), Straayer et al.
patent: 5586058 (1996-12-01), Aloni et al.
patent: 5608453 (1997-03-01), Gerber et al.
patent: 5751910 (1998-05-01), Bryant et al.
patent: 5774572 (1998-06-01), Caspi
patent: 5848189 (1998-12-01),

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and system for detecting defects on a printed circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for detecting defects on a printed circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for detecting defects on a printed circuit... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3333533

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.