Method and system for designing a circuit using RC and timing we

Details Method and system for designing a circuit using RC and timing we Method and system for designing a circuit using RC and timing we

1996-03-25

1998-09-29

Voeltz, Emanuel Todd

Boots, shoes, and leggings

364488, 364489, 364491, G06F 1700

Patent

active

058154060

ABSTRACT:
A timing driven placement system and method for designing an integrated circuit. The inventive method includes the steps of identifying a plurality of nets having blocks of circuit components connected by conductive elements and assigning weights to the nets in proportion to timing and resistive-capacitive (RC) effects therein. In the preferred embodiment, the weights are used by a conventional placement program to obtain the final placements.

REFERENCES:
patent: 5461576 (1995-10-01), Tsay et al.
patent: 5521837 (1996-05-01), Frankle et al.
patent: 5617325 (1997-04-01), Schaefer
patent: 5648913 (1997-07-01), Bennett et al.
patent: 5666290 (1997-09-01), Li et al.
Tanka et al. "Minimum Delay Placement With Influence of Nets and Hierarchical Clustering,"IEEE, pp. 663-666 1994.

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