Method and system for data management in a video decoder

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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Reexamination Certificate

active

06823016

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a command queue manager. More particularly, the present invention relates to a method and system for minimizing bus traffic in a video decoder.
2. The Background Art
With the merging of personal computer systems and entertainment systems, digital component video and audio were developed. Typically, this audio and video data are encoded into a compressed program stream for transmission. A stream demultiplexer parses the incoming program stream into audio and video bitstreams. When video frames are ultimately displayed, there must be a decompression of these compressed video bitstreams. A video decoder is used for this decompression, or decoding, process.
According to the MPEG-2 video compression standard, the compression ratio can be as high as 50 to 1. Similarly, decompression expands data up to 50 times. This high data rate, as well as the high video window resolution of MPEG-2 decoding, puts heavy demands on the video system. Moreover, at the present time, a video decoder must accomodate a frame rate of approximately 30 frames per second.
Traditionally, software sends video data to a video decoder implemented entirely in hardware. If the entire decoder is built in hardware, then only a compressed data stream is needed. As a result, a decoder built entirely in hardware is extremely fast. However, the hardwired decoder is inflexible as well as complex, which makes the debugging process extremely difficult. In addition, the hardwired decoder requires numerous gates, resulting in a costly system.
Software can be used to provide greater versatility. However, software is computation intensive, and results in a substantial increase in bus traffic. Accordingly, a need exists for a video decoder which provides greater flexibility than the hardwired decoder while minimizing bus traffic and reducing hardware costs.
BRIEF DESCRIPTION OF THE INVENTION
According to a first aspect of the present invention, a method and system for selectively controlling each hardware device within a video decoder includes obtaining a video stream, performing Variable Length Coding (VLC) decoding, on the video stream, encoding a plurality of instructions to control each hardware device within the video decoder, decoding each one of the plurality of instructions, and controlling each hardware device in response to the plurality of instructions. Since the decoder of the present invention comprises hardware and software, greater versatility than traditional hardwired decoders is achieved while manufacturing costs are substantially reduced. Thus, the decoder has the flexibility to control the hardware devices through the use of an instruction set. Since the software portion of the video decoder can instruct the hardware to perform operations that the data stream requires, various instructions can be used to control the hardware to compensate for various problems with a data stream, or substitute software functions in place of non-functional hardware devices. Moreover, since the CPU in a desktop or laptop computer environment can be used to process a portion of the decoding steps at the beginning of the process, it is beneficial to take advantage of this added processing power.
According to a second aspect of the present invention, a method and system for compressing Inverse Discrete Cosine Transform (IDCT) coefficients corresponding to a macroblock, the macroblock having a plurality of blocks, includes locating each non-zero IDCT coefficient corresponding to one of the plurality of blocks, assigning an index to each non-zero IDCT coefficient, the index designating a location within the one of the plurality of blocks, packing each non-zero IDCT coefficient in little endian format, and specifying a terminator bit corresponding to each non-zero coefficient, the terminator bit indicating the end of all non-zero IDCT coefficients for the one of the plurality of blocks. Since the IDCT coefficients are packed in this manner, bus traffic is decreased and efficiency of the decoder is increased.
According to a third aspect of the present invention, a method and system for processing a portion of a reference picture includes designating the reference picture, selecting a display picture within the reference picture, transmitting a display picture size, and sending a display picture offset. This method allows panning and shifting of a display window selected by a user within a reference picture. Therefore, the present invention provides greater flexibility than systems limiting the display picture size to that of the reference picture. Furthermore, only the display picture data rather than the reference picture data must be processed, resulting in a more efficient decoder.


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