Dynamic information storage or retrieval – Binary pulse train information signal – Having specific code or form generation or regeneration...
Reexamination Certificate
2000-01-31
2003-04-01
Young, W. R. (Department: 2655)
Dynamic information storage or retrieval
Binary pulse train information signal
Having specific code or form generation or regeneration...
C341S059000
Reexamination Certificate
active
06542452
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 88117002, filed Oct. 2, 1999.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to digital technology, and more particularly, to a digital sum variation (DSV) computation method and system which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols.
2. Description of Related Art
In a CD (compact disc) system, analog audio signals are processed through sampling and analog-to-digital conversion into a stream of digital data. Typically, the digital data are formatted into 16-bit words, with each word consisting of two bytes. By convention, each byte of the digital data is referred to as a symbol. These digital data are then written onto a CD. There exist, however, some problems when reading these digital data from the CD if these data are directly written onto the CD without further processing.
Conventionally, these digital data should be further processed through the what is known as an eight-to-fourteen modulation (EFM) to convert each 8-bit symbol into a 14-bit data length called channel bits (each set of channel bits is hereinafter referred to as a channel-bit symbol. The EFM process is achieved through the use of a lookup table. The length of each channel-bit symbol should be compliant with the specified run length of the CD driver between 3 bits and 11 bits.
During a write operation, it is possible that the current channel-bit symbol and the next one are not compliant with the specified run length. One solution to this problem is to insert 3 bits, called merge bits, between each succeeding pair of channel-bit symbols, so as to ensure that all the data written onto the CD are absolutely compliant with the run length.
There are four merge-bit symbols (000), (001), (010), and (100) which can be selected for insertion between each succeeding pair of channel-bit symbols; through computation, the optimal merge-bit symbol can be found for the insertion.
During write operation, a pit is formed in the CD surface for each change of binary value. During read operation, the CD driver can produce a what is known as a Non-Return-to-Zero-and-Invert (NRZI) signal based on the pattern of the pits on the CD.
FIG. 1
is a schematic diagram used to depict the generation of an NRZI signal and a bit stream from a pattern of pits on a CD. During the read, when a pit is encountered, it represents a logic change from 0 to 1 or from 1 to 0. The starting logic voltage state for the NRZI signal can be either LOW or HIGH. In the example of
FIG. 1
, the NRZI signal waveform (I) has a LOW starting logic voltage state, whereas the NRZI signal waveform (II) has a HIGH starting logic voltage state. In either case, the CD driver can produce a bit stream of channel-bit symbols (efm
1
, efm
2
, efm
3
) and a number of merge-bit symbols (m
1
, m
2
, m
3
) each being inserted between one succeeding pair of the channel-bit symbols. The merge-bit symbols (m
1
, m
2
, m
3
) can be removed later to obtain the channel-bit symbols (efm
1
, efm
2
, efm
3
) which are then processed through reverse EFM to recover the original 8-bit symbols (SYM
1
, SYM
2
, SYM
3
).
In the case of the NRZI signal waveform (I), whose starting logic voltage state is LOW, its digital sum variation (DSV), here represented by DSV
1
, can be computed as follows: since efm
1
=(01001000100000), the DSV
1
value at t
0
is 0; subsequently, since the first bit 0 is at the LOW state, the DSV
1
value becomes −1; subsequently, since the next three bits 100 are at the HIGH state, the DSV
1
value becomes −1+3=+2; subsequently, since the next four bits 1000 are at the LOW state, the DSV
1
value becomes +2−4=−2; and subsequently, since the next six bits 1000000 are at the HIGH state, the DSV
1
value becomes −2+6=+4.
Subsequently at t
2
(i.e., at the end of m
2
), the DSV
1
value becomes +5; at t
3
(i.e., at the end of efm
2
), the DSV
1
value becomes −3; at t
4
(i.e., at the end of m
3
), the DSV
1
value becomes −2; at t
5
(i.e., at the end of efm
3
), the DSV
1
value becomes 0. The DSV for the NRZI signal waveform (II), here denoted by DSV
2
, is simply the negative of the DSV
1
value, i.e., DSV
2
=−DSV
1
at any time point.
What is described above is how the pattern of pits on a CD can be converted into a stream of bit data during read operation. The encoding of the original digital data through EFM with insertion of merge bits before being written onto the CD is rather complex in procedure. The U.S. Pat. No. 5,375,249 entitled “EIGHT-TO-FOURTEEN-MODULATION CIRCUIT FOR A DIGITAL AUDIO DISC SYSTEM” issued on Dec. 20, 1994 discloses a method for finding the optimal merge-bit symbol through the use of DSV. This patented method is briefly depicted in the following with reference to FIG.
2
.
Referring to
FIG. 2
, after efm
1
and efm
2
are obtained, four bit streams are obtained by inserting each of the following four merge-bit symbols: (000), (001), (010), and (100), between efm
1
and efm
2
. After this, the respective DSV values for these four bit streams are computed, which are respectively denoted by DSV
1
, DSV
2
, DSV
3
, and DSV
4
.
Next, whether the length of the merge bits inserted between efm
1
and efm
2
exceeds the specified run length is checked; if the length is exceeded, these merge bits are inhibited from insertion between efm
1
and efm
2
. To do this, a check is conducted for each of the four bit streams as to whether the number of consecutive 0s between the last 1 and the next 1 in efm
1
exceeds the run length, and whether the number of consecutive 0s between the first 1 and the preceding 1 in efm
2
exceeds the run length.
In the example of
FIG. 2
, efm
1
=(0100100100000), efm
2
=(00100100000000), and efm
3
=(01000001000000). Then, the insertion of each of the four merge-bit symbols: m
1
=(000), m
2
=(001), m
3
=(010), and m
4
=(100), between efm
1
and efm
2
results in four bit streams, with DSV
1
=+15, DSV
2
−3, DSV
3
=−5, and DSV
4
=−7, where DSV
1
is the DSV of the bit stream (efm
1
, m
1
, efm
2
); DSV
2
is the DSV of the bit stream (efm
1
, m
2
, efm
2
); DSV
3
is the DSV of the bit stream (efm
1
, m
3
, efm
2
); and DSV
4
is the DSV of the bit stream (efm
1
, m
4
, efm
2
). Among these DSV values, DSV
2
=−3 is closest to 0, and the associated merge-bit symbol m
2
=(001) is therefore chosen for insertion between efm
1
and efm
2
.
In a similar manner, for efm
2
and efm
3
, the DSV value of −8 can be obtained for the bit stream (efm
2
, m
1
, efm
3
). The bit stream (efm
2
, m
2
, efm
3
) is not compliant with the run length and is therefore disregarded. the DSV value for the bit stream (efm
2
, M
3
, efm
3
) is 0, and the DSV value for the bit stream (efm
2
, m
4
, efm
3
) is 2. Among these DSV values, DSV=0 is closest to 0, andthe associated merge-bit symbol m
3
=(010) is therefore chosen for insertion between efm
2
and efm
3
. An NRZI signal can be then obtained based on the resulting bit stream (efm
2
, m
3
, efm
3
).
One drawback to the foregoing method, however, is that a large amount of memory space is required to implement the DSV-based algorithm for finding the optimal merge-bit symbol for insertion between each succeeding pair of the 14-bit channel-bit symbols. This is because that the method requires the storage of a lookup table used in the EFM process and the binary data of each 14-bit channel-bit symbols, which are quite memory-consuming. Moreover, the process for finding the optimal merge-bit symbol is quite complex in procedure, and requires a lengthy program to implement.
SUMMARY OF THE INVENTION
It is therefore an objective of this invention to provide a DSV computati
Pan Jyh-Shin
Wu Wen-Yi
J.C. Patents
Mediatek Inc.
Patel Gautam R.
Young W. R.
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