Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate
2011-03-01
2011-03-01
Garbowski, Leigh Marie (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Logic design processing
C716S104000, C716S106000, C716S110000
Reexamination Certificate
active
07900174
ABSTRACT:
A method and a system for characterizing an integrated circuit (IC) design are disclosed. The method includes receiving a description of leaf cells used in the IC design. The IC design is described in a high-level language by using the description of the leaf cells. The description of the IC design includes specifying placement of the leaf cells and specifying connectivity between them. Further, the method includes extracting a circuit netlist file based on the physical layout of the IC design. The instructions are defined in the high-level language to perform simulations on the extracted circuit netlist file. These simulations are performed on the circuit netlist file to determine the values of the design parameters. Furthermore, the method includes providing the values of the design parameters of the IC design in a pre-defined output format based on the simulations.
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Adhikari Shelly
Chopra Rajat
Gupta Richa
Mukherjee Kousik
Shankar Rajiv
Garbowski Leigh Marie
Interra Systems Inc
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