Oscillators – With frequency adjusting means – Step-frequency change
Reexamination Certificate
2007-10-05
2009-10-27
Pascal, Robert (Department: 2817)
Oscillators
With frequency adjusting means
Step-frequency change
C331S044000, C331S03600C, C331S167000
Reexamination Certificate
active
07609122
ABSTRACT:
A phase lock loop (PLL) includes a calibration loop for calibrating a tank circuit for capacitance variation through process variations of manufacturing an integrated circuit including the PLL. A capacitance profile for setting the frequency of the PLL at a process comer is stored. At power up, or after an idle time, a calibration is performed at two frequencies. The capacitances of operating the phase lock loop at the two frequencies are determined and stored. During a frequency change, the capacitance of operating the PLL is determined from the capacitance profile and stored capacitances. The capacitance of the PLL is presumed to change linearly with frequency and the two stored capacitances are used to determine a difference capacitance at the selected frequency by linear interpolating between the two stored capacitances, which is added to the capacitance in the capacitance profile at the selected frequency to generate an operating capacitance.
REFERENCES:
patent: 7382199 (2008-06-01), Talwalkar
patent: 2003/0206065 (2003-11-01), Gomez
patent: 2006/0145769 (2006-07-01), Vaananen et al.
patent: 2006/0226916 (2006-10-01), Florescu et al.
Chien Charles
Jian Heng-Yu
Wu Yi-Cheng
Xu Zhiwei
DLA Piper (LLP) US
Johnson Ryan J.
Pascal Robert
Silicon Storage Technology, Inc.
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