Patent
1995-06-07
1999-10-26
Lall, Parshotam S.
395391, 395393, 395582, 395583, 39580023, G06F 938
Patent
active
059742402
ABSTRACT:
In response to dispatching a condition register modifying instruction to an execution unit, a condition register rename buffer is associated with such a condition register modifying instruction. The instruction is then executed in the execution unit. Following the execution of the condition register modifying instruction, condition register data is set in the condition register rename buffer to reflect the result of such instruction execution. Additionally, an indicator is set to indicate the condition register data is valid. At the time for completing the condition register modifying instruction, the condition register data is transferred from the condition register rename buffer to the architected condition register, thereby permitting condition register modifying instructions to be dispatched, executed, and finished before the condition register is available to complete each condition register modifying instruction.
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Barot Bharat
Dillon Andrew J.
England Anthony V.S.
International Business Machines - Corporation
Lall Parshotam S.
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