Method and system for automated electromigration verification in

Details Method and system for automated electromigration verification in Method and system for automated electromigration verification in

1996-06-24

1998-11-03

Voeltz, Emanuel Todd

Boots, shoes, and leggings

364488, 364490, 364491, G06F 1700

Patent

active

058318674

ABSTRACT:
An automated method and system for detecting electromigration violations in signal lines of an integrated circuit design to be fabricated is disclosed. The automated method and system checks conductive traces, vias and/or contacts that are used to route signals to and from various functional cells within the integrated circuit design against predetermined process rules to detect electromigration violations. The operation and effectiveness of the automated method and system are far superior to conventional manual approaches.

REFERENCES:
patent: 5410490 (1995-04-01), Yastrow
patent: 5581475 (1996-12-01), Majors
patent: 5598348 (1997-01-01), Rusu et al.
Yi et al. "Electromigration-Induced Integration Limits on the Future ULSI's and the Beneficial Effects of Lower Operation Temperatures," IEEE, pp. 683-688, Apr. 1995.
Ghandhi, Sorab K., "VLSI Fabrication Principles-Silicon and Gallium Arsenide", 2nd Edition, John Wiley & Sons, Inc., 1994, pp. 526-527.
"PowerMill Product Brief", EPIC Design Technology, Inc., Dec. 16, 1994.

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