Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Patent
1997-06-18
1998-11-03
Callahan, Timothy P.
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
327144, 327152, 327276, 327291, H03K 513
Patent
active
058314598
ABSTRACT:
A method and system are provided. A clock signal is input and output at first and second nodes of integrated circuitry. The first node is connected through a selected one of a plurality of metallization paths of the integrated circuitry to the second node. Each of the metallization paths is connectable between the first and second nodes for delaying the clock signal by a respective amount of time between the first and second nodes, so that the clock signal at the second node is always delayed relative to the first node by the respective amount of time of the selected metallization path.
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IBM Technical Disclosure Bulletin, vol. 30, No. 2, Jul. 1987 "Scheme for Reducing Clock Skew In Multiple--Chip System Design".
Callahan Timothy P.
Davis, Jr. Michael A.
International Business Machines - Corporation
Lam T. T.
Salys Casimer K.
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