Method and structure for use in designing and building electroni

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364488, 364491, G06F 15606

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046139400

ABSTRACT:
A method of designing an integrated circuit layout based on primitive elements such as transistors, resistors, and conductors and cell structures formed from the primitive functional element. The primitive elements are defined by surface dimensions, semiconductor construction, and surface layers and can be placed to accommodate special cell structures and functions. Design time can be minimized by using preexisting cell structures stored in suitable computer means, or layout surface and production costs can be minimized by designing new cell structures using a simple technique. Process independence can be achieved by having a complete design based on a small number of primitive elements which can be readily modified.

REFERENCES:
patent: 3654615 (1972-04-01), Freitag
patent: 4377849 (1983-03-01), Finger et al.
IEEE Circuits & Systems Int'l Sypm, 1980 (vol. 3); "Graph-Oriented Approach to the Layout Problem"; R. Otten et al., pp. 956-959.
17th Design Automation Conference, Jun. 23-25, 1980; "The Genealogical Approach to the Layout Problem"; A. A. Szepieniec et al., pp. 535-542.
IEEE Spectrum, Jun. 1982 (v 19 N 6); "Automating Chip Layout"; S. Trimberger, pp. 38-45.
Int'l Con. Comp. Aid. Des., Apr. 15-18, 1969; "The Automatic Design of Interconnection Patterns for L.S.I."; P. E. Radley, pp. 114-121.
Int'l Conf C.A.D., Apr. 15-18, 1969; "Computer-Aided Production of Masks for Silicon I.C.'s", J. Wood et al., pp. 122-129.
IBM Tech. Dis. Bulletin, Oct. 1970, (V 13 N 5); "Producing Integrated Circuits from a Circuit Logic Input", O. Bilous et al., pp. 1084-1089.
IEEE Trans on Elec Dev, Apr. 1979, (v. ED-26 N. 4); "Data Processing System of Electron-Beam Lithography for VLSI Microfabrication", Sugiyama et al., pp. 675-685.
"Computer Oriented Circuit Design", F. F. Kuo et al., Prentice-Hall, 1969, pp. 19-23, 523-530.

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