Railway mail delivery – Projectors
Reexamination Certificate
2002-02-06
2004-08-24
Lee, Eddie (Department: 2811)
Railway mail delivery
Projectors
C257S702000, C257S701000, C257S737000, C257S738000, C257S774000, C257S784000, C257S787000
Reexamination Certificate
active
06779783
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 90129240, filed Nov. 27, 2001.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a ball grid array package. More particularly, the present invention relates to a tape ball grid array (TBGA) package structure and corresponding method of manufacture.
2. Description of Related Art
Ball grid array (BGA) is a type of package that uses an array of solder balls on the bottom surface of a substrate to serve as leads instead of using a conventional lead frame. In general, bonding pads on a chip connect with corresponding connecting pads on the substrate by metallic wire or by forming a flip-chip structure. Through various internal trace lines, the connecting pads are connected to other contact points on the top surface of the substrate. By forming vias through the substrate, the contact points on the top surface of the substrate are electrically connected to contact points on the bottom surface of the substrate. The solder balls are attached to the contact points on the bottom surface of the substrate. Since a ball grid array (BGA) package can make use of the entire lower surface of the substrate for distributing the contact points, a high pin count package is conveniently fabricated. In addition, when the solder ball is heated to conduct a reflow operation, surface tension of the solder has a self-aligningcapability. Thus, the solder balls need not be accurately positioned. Furthermore, the reflow operation confers not only a high bonding strength to the solder balls, but also provides superior electrical connectivity.
Ball grid array packages may be classified into plastic-molded plastic ball grid array (PBGA) packages, ceramic-molded ceramic ball grid array (CBGA) packages and tape ball grid array (TBGA) packages having a circuit patterned tape for connecting with a chip. Among the three types of ball grid array packages, the tape ball grid array (TBGA) packages provide a higher pin count, a thinner and lighter package and has better electrical properties and heat dissipation capacity. The TBGA package is particularly suitable for housing an application specific integrated circuit (ASIC) or a microprocessor.
FIG. 1
is a cross-sectional view of a conventional tape ball grid array package. As shown in
FIG. 1
, the tape
110
of the tape ball grid array package
100
consists of a pair of copper foils
112
and
114
, a dielectric layer
116
made from polyimid or other flexible resin sandwiched between. The copper foils
112
and
114
are patterned to form circuits. Furthermore, vias
118
are formed in the dielectric layer
116
, and a solder mask layer
120
is patterned to expose a portion of the copper foil
114
that serves as solder ball pads
122
. Solder balls
124
are mounted onto various solder ball pads
122
. The die pads
202
on a chip
200
are connected to the circuit pattern on the copper foil
114
through conductive wires
126
. The chip
200
is electrically connected to external devices via the patterned copper foil
114
and the solder balls
124
.
The tape
110
is attached to the bottom surface of a stiffener
140
using adhesive
130
a
. The stiffener
140
is attached to the bottom surface of a heat sink
150
using adhesive
130
b
. Surrounded by the stiffener
140
, the chip
200
is attached to the bottom of a heat sink
150
using adhesive
130
. Note that the copper foil
112
on the upper surface of the tape
110
is a common ground or a power layer. To apply a ground voltage or power voltage to the copper foil
112
through a solder ball
124
, vias
118
are formed in the dielectric layer
116
to connect the solder ball
124
to the copper foil
112
electrically. However, a number of additional steps and chemicals are needed to form the vias
118
in the dielectric layer
116
such as de-smearing and copper plating. These processes not only increase production cost, but also increase manufacturing time as well.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to provide a tape ball grid array (TBGA) package and a method of manufacturing the package that can simplify the number of processing steps, shorten the manufacturing time and lower the manufacturing cost.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a tape ball grid array package. The TBGA package has a tape comprising a dielectric layer, a first metallic layer and a second metallic layer. The dielectric layer has a plurality of via holes that pass through the dielectric layer. The first metallic layer is on one side of the dielectric layer and covers one end of the via holes to form a plurality of blind holes. The second metallic layer is on the other side of the dielectric layer and exposes the open end of the blind holes. A first solder mask layer is on top of the first metallic layer. The first solder mask layer exposes a portion of the first metallic layer and forms a plurality of contact points. In addition, a second solder mask layer is on top of the second metallic layer and exposes a portion of the second metallic layer and the other end of the blind holes. A solder ball is placed over the open end of each blind hole such that one end of the solder ball protrudes from the surface of the second solder mask layer. These solder balls connect electrically with the first metallic layer and at least one solder ball connects electrically with the second metallic layer. A chip is on the first surface of the dielectric layer, and the bonding pads on the chip connect electrically with the respective contact points on the first metallic layer.
This invention also provides a method of forming a tape ball grid array package. First, a tape comprising a dielectric layer, a first metallic layer and a second metallic layer is provided. The first metallic layer is on a first surface of the dielectric layer while the second metallic layer is on the other surface of the dielectric layer. The first metallic layer and the second metallic layer are patterned. A plurality of blind holes is formed in the tape such that the blind holes pass through the second metallic layer and the dielectric layer but stop at the first metallic layer. Ni/Au is plated on both first and second metallic layers. A first patterned solder mask layer and a second patterned solder mask layer are formed over the first metallic layer and the second metallic layer respectively. The first solder mask layer exposes a portion of the first metallic layer to form a plurality of contact points. The second solder mask layer exposes a portion of the second metallic layer and one end of the blind holes. A solder ball is placed over the open end of each blind hole such that one end of the solder ball protrudes above the outer surface of the second solder mask layer. These solder balls connect electrically with the first metallic layer, and at least one solder ball connects electrically with the second metallic layer. A chip is attached to the first surface of the dielectric layer, and the bonding pads on the chip are electrically connected to the respective contact points on the first metallic layer by wire-bonding or flip-chip attachment.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5835355 (1998-11-01), Dordi
patent: 5866949 (1999-02-01), Schueller
patent: 6084297 (2000-07-01), Brooks et al.
patent: 6140707 (2000-10-01), Plepys et al.
Fu Jackie
Ho Kwun-Yao
Kung Chen-Yueh
J.C. Patents
Lee Eddie
Parekh Nitin
VIA Technologies Inc.
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