Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2011-08-02
2011-08-02
Sarkar, Asok K (Department: 2891)
Semiconductor device manufacturing: process
With measuring or testing
C356S243100, C356S243400, C257SE23179
Reexamination Certificate
active
07989228
ABSTRACT:
A method for using a calibration standard. The method includes providing a calibration standard. In a specific embodiment, the calibration standard has a substrate, a thickness of material having an edge region; and a conformal material of uniform thickness disposed on the edge region. The standard also has an upper surface pattern having the uniform thickness provided on the edge region. The method also includes using the upper surface pattern for a calibration process on a scanning electron microscope process.
REFERENCES:
patent: 5332685 (1994-07-01), Park et al.
patent: 5429988 (1995-07-01), Huang et al.
patent: 5811331 (1998-09-01), Ying et al.
patent: 6358860 (2002-03-01), Scheer et al.
patent: 6583000 (2003-06-01), Hsu et al.
patent: 6861118 (2005-03-01), Kobayashi et al.
patent: 6911372 (2005-06-01), Son
patent: 2005/0170603 (2005-08-01), Lee et al.
Office Action of Chinese Application No. 200510110573.0, dated Nov. 16, 2007 7 pages total (English translation not included).
Guo Liqi
Wan Xudong
Wang Eugene
Kilpatrick Townsend and Stockton LLP
Sarkar Asok K
Semiconductor Manufacturing International (Shanghai) Corporation
Slutsker Julia
LandOfFree
Method and structure for sample preparation for scanning... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and structure for sample preparation for scanning..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and structure for sample preparation for scanning... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2666571