Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2007-03-27
2007-03-27
Menz, Doug (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S734000, C257S767000
Reexamination Certificate
active
11259965
ABSTRACT:
A low resistance copper damascene interconnect structure is formed by providing a thin dielectric film such as SiC or SiOC formed on the sidewalls of the via and trench structures to function as a copper diffusion barrier layer. The dielectric copper diffusion barrier formed on the bottom of the trench structure is removed by anisotropic etching to expose patterned metal areas. The residual dielectric thus forms a dielectric diffusion barrier film on the sidewalls of the structure, and coupled with the metal diffusion barrier subsequently formed in the trench, creates a copper diffusion barrier to protect the bulk dielectric from copper leakage.
REFERENCES:
patent: 6555461 (2003-04-01), Woo et al.
patent: 6706629 (2004-03-01), Lin et al.
patent: 2002/0060363 (2002-05-01), Xi et al.
patent: 2004/0130035 (2004-07-01), Wu et al.
“Dual Damascene” Overcoming process issues, Semiconductor International (Jun. 2000).
Burke Peter A.
Lu Hongqiang
Sun Sey-Shing
Beyer & Weaver, LLP
LSI Logic Corporation
Menz Doug
LandOfFree
Method and structure for creating ultra low resistance... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and structure for creating ultra low resistance..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and structure for creating ultra low resistance... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3774606