Method and structure for controllng carrier lifetime in semicond

Details Method and structure for controllng carrier lifetime in semicond Method and structure for controllng carrier lifetime in semicond

1975-08-07

1977-10-11

Larkins, William D.

Metal treatment

Stock

Ferrous

357 29, 357 42, 357 48, 357 91, 148 15, H01L 2176, H01L 21265, H01L 29167, H01L 2932

Patent

active

040539253

ABSTRACT:
The device structure is a bi-polar transistor having a region of inert atoms located in the collector adjacent to the base-collector junction. Another embodiment of the invention is a complementary insulated gate field effect transistor (IGFET) structure having N and P channel IGFETs with regions of implanted ions beneath the source and drain of one or both transistors, and/or annular regions projecting inwardly from the surface that surround or separate the different types of IGFETs.

REFERENCES:
patent: 3502515 (1970-03-01), McMullen et al.
patent: 3645808 (1972-02-01), Kamiyama et al.
patent: 3796929 (1974-03-01), Nicholas et al.
patent: 3888701 (1975-06-01), Tarneja et al.
Dennehy, "Non-Latching Integrated Circuits", RCA Tech. Note No. 876, Feb. 1971.

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