Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2002-09-20
2004-11-16
Fourson, George (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S010000, C257S011000, C257S012000, C257S013000, C257S016000, C257S209000, C257SE27071, C257SE23150, C257SE23148, C257SE27047
Reexamination Certificate
active
06818966
ABSTRACT:
FIELD OF INVENTION
The present invention relates to integrated circuits. More particularly, the present invention relates to a method and structure for controlling the surface properties of dielectric layers in a thin film component to improve the laser trimming process.
BACKGROUND OF THE INVENTION
The demand for improved operational amplifiers, as well as instrumentation amplifiers, voltage regulators, references and analog-to-digital (A/D) and digital-to-analog (D/A) converters, for high-precision data acquisition and instrumentation applications continues to increase. The majority of high performance amplifiers, circuits and devices utilize thin film techniques. In thin film techniques, a thin film metal and other dielectrics of a few &mgr;m thick are deposited on a suitable substrate material and formed into the desired pattern for interconnections and components.
Thin film techniques are frequently used for the fabrication of resistors to satisfy miniaturization requirements while providing a very high component density that is desirable in such circuit designs. Thin film resistors can give excellent matching if designed with care, and can have longer term stability and higher reliability. By using a metal film as the resistance material, thin film resistors are able to provide a very low temperature coefficient of resistance (TCR), significantly lower current noise and small non-linearity. Resistor materials used in thin film resistors typically include SiCr, NiCr or TaN, among others.
One of the benefits of using thin film resistors is that the resistors can be trimmed during the manufacturing process, in which the impedance of the integrated circuit can be adjusted to part-per-million type levels. Laser trimming, which uses an optical energy source, is the process most frequently used due to the ability to achieve high accuracy and volume requirements. In order to facilitate laser trimming, the optical energy needs to be focused on the thin film resistor, and more importantly, absorbed in the thin film resistor, as opposed to being reflected back.
For example, as the optical energy is focused on the thin film resistor, different results can occur. While some of the optical energy of the incident beam is absorbed in the thin film resistor to enable trimming of the impedance, some of the optical energy is transmitted through or around the thin film resistor to the substrate, and often reflected back to cause destructive interferences with the incident beam, i.e., the reflected laser energy can be reflected back causing interference with the focused laser energy used for trimming. For example, on many occasions, approximately 40% of the focused laser energy is absorbed in the thin film resistor during trimming, with the remaining laser energy being available for reflecting back to interact with the incident beam, i.e., to align itself in the direction of the incident beam. Such destructive interferences result in less energy being available to perform the trimming process, often resulting in discontinuous trimming of the thin film resistor, or the complete inability to trim.
One approach for addressing such impairments to the laser trimming process is to optimize the dielectric stacks by assessing and controlling the material properties of the dielectrics, e.g., the oxide layers, above and below the thin film resistor that is being trimmed. For example, the dielectrics can be thermally grown as a field oxide or can be deposited oxide on top of the substrate and thin film resistors. With reference to
FIG. 1
, control of the oxides above the thin film resistor can generally be within a range of approximately +/−1700 Å to enable the focusing of the laser energy to the “sweet spot” for the thin film resistor, e.g., a region
102
. However, control of the oxides below the thin film resistor needs to be within approximately +/−600 Å. While the material properties for the dielectrics should ideally be substantially the same with very small variance, the depositing of oxides prior to using chemical-mechanical polishing (CMP) can result in a variance of 2000 Å or more, and thus prevent the focusing of the laser energy to region
102
, i.e., to the “sweet spot” for the thin film resistor.
Because of the difficulty in controlling the deposited dielectrics and CMP processes, it can be difficult to obtain at least the approximately 40% to 45% of the focused laser energy that is needed to be absorbed in the thin film resistor during trimming to be effective, with the remaining laser energy being susceptible to reflection back to the incident beam. On some occasions, as little as 20% or 10% of the focused laser energy is absorbed, and thus an insufficient trimming process can occur. One approach to solve this dilemma is to increase the power of the laser energy, e.g., up to approximately 4× or more the laser energy, and/or the trimming time to obtain the equivalent of the 40% absorption rate. Unfortunately, under this approach the energy to the non-absorbed areas is also increased, thus increasing the amount of energy that is reflected back, as well as disrupting the dielectrics and/or other characteristics important to the trimming process. Further, one can exceed the available trim range due to the leakage across the laser kerf due to insufficient energy absorption at the thin film resistor.
To improve surface uniformity of the deposited layers when using chemical-mechanical polishing processes, a metal support, or “dummy fill,” is frequently used as an underlying material to provide a desired fill density before depositing the thin film material. If not, severe dishing and other defects can occur, as opposed to a more desirable flat surface. For example, with reference to
FIG. 2
, a thin film circuit
200
comprises a plurality of thin film resistors (TFR's)
202
layered on top of a substrate
204
. Because the thickness of the dielectric utilized can vary, thin film circuit
200
includes a plurality of metal “dummy fill”
206
to minimize the variances in the thickness of the dielectric layers. Dummy fill
206
comprise metal strips having different widths generally between approximately 2 &mgr;m and 3 &mgr;m, and having crowned dielectric peaks that are a function of the given width of each dummy fill
206
. Some of dummy fill
206
are configured with dielectric peaks that are raised upwards, i.e., towards thin film resistors
202
, while others are significantly smaller in order to provide as homogeneous a substrate as possible for depositing of thin film resistors
202
.
While current techniques for providing a dummy fill can improve the uniformity of the dielectrics, the substrate and dielectrics beneath the thin film resistor are still not as homogeneous as desired. For example, upon depositing of various metal layers, such as tungsten plugs, and then oxides comprising high-density plasma depositions (HDP's), dielectric peaks are produced that have a height based on the width of the dummy fill. For example, with reference to
FIG. 3
, three fill metal strips
302
,
304
and
306
having different widths are spaced apart and configured underneath a deposit of high-density plasma
308
. After applying another silicon oxide film
310
, such as TEOS, chemical-mechanical polishing is applied in attempt to provide a flat surface. Unfortunately, features, known as “tee-pees” can be formed between the high-density plasma and the plasma-enhanced TEOS layers that cause bumps in the substrate of approximately 7000 Å before chemical-mechanical polishing, and 30 Å to 50 Å or more after chemical-mechanical polishing. While these bumps or “tee-pees” are relatively small compared to the substrate, the bumps are quite large relative to the thin-film resistor that can comprise 30 Å to 35 Å in thickness, and thus cause difficulty during the trimming process and/or induce resistor instability. Accordingly, prior art methods and devices for control of dielectric layers below the thin film resistors are insu
Beach Eric W.
Hoyt Eric L.
Meinel Walter B.
Brady W. James
Fourson George
Pham Thanh V
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
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