Method and structure for charge dissipation in integrated...

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Bidirectional rectifier with control electrode

Reexamination Certificate

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C257S170000, C257S409000, C257S452000, C257S484000, C257S605000, C257SE29012

Reexamination Certificate

active

07408206

ABSTRACT:
Methods and structures and methods of designing structures for charge dissipation in an integrated circuit on an SOI substrate. A first structure includes a charge dissipation ring around a periphery of the integrated circuit chip and one or more charge dissipation pedestals physically and electrically connected to the charge dissipation pedestals. The silicon layer and bulk silicon layer of the SOI substrate are connected by the guard ring and the charge dissipation pedestals. The ground distribution grid of the integrated circuit chip is connected to an uppermost wire segment of one or more charge dissipation pedestals. A second structure, replaces the charge dissipation guard ring with additional charge dissipation pedestal elements.

REFERENCES:
patent: 4994883 (1991-02-01), Chang et al.
patent: 2002/0167053 (2002-11-01), Huang
patent: 2007/0013072 (2007-01-01), Ellis-Monaghan et al.
patent: 2007/0218667 (2007-09-01), Rider
patent: 2007/0221990 (2007-09-01), Cote et al.

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