Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1989-07-26
1990-12-04
Hudspeth, David
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307451, 307481, 307263, 307594, 3072968, 307310, H03K 1714
Patent
active
049755994
ABSTRACT:
According to the present invention, an improved CMOS integrated circuit and an improved method of forming the circuit is provided. The circuit has a first FET device and a second FET device, and at least one performance characteristic of said first and second FET devices varies in the same manner with the variation of at least one performance related process variable condition. Each of said FET devices has an output signal at least one characteristic of which is changed by a change in the performance related variable condition. The first and second FET devices are connected such that the one output characteristic of the second FET device acts in opposition to the one output characteristic of the first FET device to provide a merged output signal representative of the combined effect of the two FET devices. The second FET device is constructed so as to be more responsive to the variations in said performance related variable condition than the first FET device and to have a weaker output signal than the first FET device, whereby the merged output signal of the two FET devices is maintained relatively constant irrespective of variations in the performance related variable condition.
REFERENCES:
patent: 4242604 (1980-12-01), Smith
patent: 4473762 (1984-09-01), Iwahashi et al.
patent: 4614882 (1986-09-01), Parker et al.
patent: 4742247 (1988-03-01), Venkatesh
patent: 4760288 (1988-07-01), Peczalski
patent: 4763021 (1988-08-01), Stickel
patent: 4791326 (1988-12-01), Vajdie et al.
patent: 4818901 (1989-04-01), Young et al.
patent: 4820942 (1989-04-01), Chan
patent: 4857770 (1989-08-01), Pantovi et al.
patent: 4894561 (1990-01-01), Nogami
Redkokasha, "Reduction of the Temperature Dependence of the Channel Resistance in a MOS Transistor", Meas. Tech (U.S.A.), vol. 22, No.7, Dec. 1979, pp. 838-840.
Petrovick, Jr. John G.
Taylor Robert S.
Hudspeth David
International Business Machines - Corporation
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