Method and program for pattern data generation using a...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification

Reexamination Certificate

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C716S101000, C438S014000

Reexamination Certificate

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07917871

ABSTRACT:
A pattern data generation method of an aspect of the present invention, the method includes creating at least one modification guide to modify a modification target point contained in pattern data, evaluating the modification guides on the basis of an evaluation item, the evaluation item being a change in the shape of the pattern data for the modification target point caused by the modification based on the modification guides or a change in electric characteristics of a pattern formed in accordance with the pattern data, selecting a predetermined modification guide from among the modification guides on the basis of the evaluation result of the modification guides, and modifying the modification target point in accordance with the selected modification guide.

REFERENCES:
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patent: 2005/0134866 (2005-06-01), Kyoh et al.
patent: 2005/0188338 (2005-08-01), Kroyan et al.
patent: 2005/0204322 (2005-09-01), Kotani et al.
patent: 2007/0234243 (2007-10-01), Kyoh
patent: 2007/0264731 (2007-11-01), Jeng
patent: 2008/0098341 (2008-04-01), Kobayashi et al.
patent: 2008/0301620 (2008-12-01), Ye et al.
patent: 2005-181524 (2005-07-01), None
patent: 2005-181612 (2005-07-01), None
Kotani et al.; “Development of Hot Spot Fixer (HSF)”; Design and Process Integration for Microelectronic Manufacturing IV; Proc. SPIE, vol. 6156 (Feb. 23, 2006); San Jose, CA, USA; Online Publication Date: Mar. 24, 2006; pp. 1-8.
Maeda; “Pattern Producing Method, Semiconductor Device Manufacturing Method and Program”, U.S. Appl. No. 11/892,764, filed Aug. 27, 2007.
Kobayashi et al.; “Automated Hot-Spot Fixing System Applied for Metal Layers of 65 NM Logic Devices”, Procs. of SPIE, vol. 6283, pp. 62830R-1-62830R-11, (2006).

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