Method and program for designing semiconductor integrated...

Details Method and program for designing semiconductor integrated... Method and program for designing semiconductor integrated...

2011-03-22

2011-03-22

Whitmore, Stacy A (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

Reexamination Certificate

active

07913214

ABSTRACT:
A design method for an LSI includes: generating a delay library for use in a statistical STA, wherein the delay library provides a delay function that expresses a cell delay value as a function of model parameters of a transistor; generating a layout data; and calculating a delay value of a target cell based on the delay library and the layout data. The calculating includes: referring to the layout data to extract a parameter specifying a layout pattern around a target transistor; modulating model parameters of the target transistor such that the characteristics corresponding to the extracted parameter is obtained in a circuit simulation; calculating, by using the delay function, a reference delay value of the target cell; and calculating, by using the delay function and the modulation amount of the model parameter, a delay variation from the reference delay value depending on the modulation amount.

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U.S. Appl. No. 12/219,056, filed Jul. 15, 2008, NEC Electronics Corp.
U.S. Appl. No. 12/219,057, filed Jul. 15, 2008, NEC Electronics Corp.

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