Method and program for designing semiconductor device

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing

Reexamination Certificate

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C716S108000, C716S111000, C716S113000, C716S114000, C716S119000

Reexamination Certificate

active

07996796

ABSTRACT:
A method of designing a semiconductor device is provided. According to the method, a group of cells that is a target of clock distribution is placed. After the group of cells is placed, a plurality of clock driver cells for driving the clock are placed such that each clock driver cell is prohibited from overlapping with a prohibited region of a predetermined size surrounding another clock driver cell.

REFERENCES:
patent: 6311313 (2001-10-01), Camporese et al.
patent: 6351840 (2002-02-01), Teng
patent: 6480994 (2002-11-01), Tetelbaum et al.
patent: 7617472 (2009-11-01), Bergendahl et al.
patent: 2007/0157144 (2007-07-01), Mai et al.
patent: 11-3942 (1999-01-01), None

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