Method and output buffer with programmable bias to accommodate m

Details Method and output buffer with programmable bias to accommodate m Method and output buffer with programmable bias to accommodate m

1997-12-09

1999-06-29

Ton, My-Trang Nu

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

327530, H03L 500

Patent

active

059173580

ABSTRACT:
Output buffer (100) translates input signals from one voltage range to a second voltage range. The second voltage range may be identical to the first range or may be greater. The particular range is programmable by one of several ways. This feature makes output buffer especially suitable for use in devices which must be compatible with two voltage ranges. Output buffer uses a bias generator (110) to limit the voltage across the gate oxide of its various transistors to a level which is consistent with the first voltage range.

REFERENCES:
patent: 5136190 (1992-08-01), Chern et al.
patent: 5304872 (1994-04-01), Avraham et al.
patent: 5717342 (1998-02-01), Lotfi et al.
patent: 5729164 (1998-03-01), Pattantyus
patent: 5742196 (1998-04-01), Fronen et al.
patent: 5801569 (1998-09-01), Pinkham
Ohtomo, et al., "A quarter-micron SIMOX-CMOS LVTTL-compatible Gate Array with over 2,000 V ESD-protection circuit", IEEE Custom Integrated Circuits Conference, pp. 57-60 (1996).

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