Method and/or architecture implemented in hardware for the...

Details Method and/or architecture implemented in hardware for the... Method and/or architecture implemented in hardware for the...

2004-03-30

2008-05-20

Lee, Andrew C. (Department: 2616)

Multiplex communications

Communication techniques for information carried in plural...

Assembly or disassembly of messages having address headers

C370S509000

Reexamination Certificate

active

07376152

ABSTRACT:
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a data output signal in response to a data input signal, a valid word signal, and a select signal. The second circuit may be configured to generate the select signal in response to the valid word signal, a start of frame signal, and end of frame signal and the data output signal. The select signal may adjust a starting point of each of the words to match a starting point of the first word.

REFERENCES:
patent: 4344180 (1982-08-01), Cummiskey
patent: 5710774 (1998-01-01), Suh et al.
patent: 7254206 (2007-08-01), Chiang

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