Method and/or architecture for implementing MPEG frame...

Details Method and/or architecture for implementing MPEG frame... Method and/or architecture for implementing MPEG frame...

2006-03-07

2006-03-07

Vo, Tung (Department: 2613)

Pulse or digital communications

Bandwidth reduction or expansion

Television or motion video signal

Reexamination Certificate

active

07010046

ABSTRACT:
An apparatus comprising a decode frame store, a B frame store, a first anchor frame store, and a second anchor frame store. The decode frame store may be configured to decode one or more free frames and generate one or more B video images and one or more anchor video images. The B frame store may be configured to receive the one or more B video images from the decode frame store. The first anchor frame store may be configured to receive the one or more anchor video images from the decode frame store. The second anchor frame store may be configured to receive the one or more anchor video images from the first anchor frame store.

REFERENCES:
patent: 5854799 (1998-12-01), Okada et al.
patent: 5909224 (1999-06-01), Fung
patent: 6118491 (2000-09-01), Wu et al.
patent: 6519286 (2003-02-01), Porter et al.
patent: 6538658 (2003-03-01), Herrera
patent: 2002/0097797 (2002-07-01), Sugiyama
patent: 2003/0012284 (2003-01-01), Kazayama et al.

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