Method and means for conditional storing of data in a reduced in

Details Method and means for conditional storing of data in a reduced in Method and means for conditional storing of data in a reduced in

1987-12-30

1989-10-10

Clark, David L.

Boots, shoes, and leggings

G06F 928

Patent

active

048736279

ABSTRACT:
In a computer device in accordance with the preferred embodiment of the invention, an instruction set which uses a two-instruction sequence to store the result of a comparison is provided. The two-instruction sequence, which uses no branch instructions, does not need to wait for condition resolution before storing conditional results. Additionally, it also is capable of implementing slightly more general operations than simply storing a zero or one value of a comparison. Basically, the instruction set in accordance with the invention compares two operands and unconditionally stores a zero, which represents a Boolean "false", into a selected destination. The instruction set then conditionally nullifies the instruction following it, thus effecting a highly efficient execution of a sequence of instructions compared to the prior art.

REFERENCES:
patent: 4569016 (1986-02-01), Hao et al.
patent: 4589065 (1986-05-01), Auslander et al.
patent: 4615004 (1986-09-01), Chevillat et al.
patent: 4654786 (1987-03-01), Cochran et al.
Patterson, D. A. and Sequin, C. H., "A VLSI RISC", Computer, Sep. 1982, pp. 8-21.

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