Method and integrated circuit adapted for partial scan testabili

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371 223, G06F 1750

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active

057107114

ABSTRACT:
A method and apparatus are taught which modify digital integrated circuits for partial scan testing and do so with little or no impact on the circuit's performance characteristics. Illustratively, the scan memory elements are selected from among all memory elements in a circuit based on their ability to eliminate feedback cycles in the circuit and on considerations of the potential performance degradation due to the inclusion of scan memory elements. A feedback cycle is defined as a feedback path from the output of a memory element to the input of said memory element.

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D. H. Lee and S. M. Reddy, "On Determining Scan Flip-Flops in Partial-Scan Designs," Int'l Conf. on Computer-Aided Design, (ICCAD-90) (Nov. 1990).

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