Method and electronic circuitry for providing a stable...

Details Method and electronic circuitry for providing a stable... Method and electronic circuitry for providing a stable...

1999-06-18

2001-02-27

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S119000

Reexamination Certificate

active

06195030

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims priority of European Patent Application No.
98500148
.
6
, which was filed on Jun. 23, 1998.
The present invention relates to a method and electronic circuitry for providing a stable Digital to Analog Converter analog output in Integrated Circuit Digital to Analog Converter applications.
For modern communication devices the trend is to integrate as much functionality as possible into the digital domain, which can be made low-cost with a high repeatability in existing digital chip technologies. Usually in communication devices a Digital Signal Processor (DSP) is the last/first digital device before the data is transferred to/from the analog domain. Therefore at the digital-analog boundary a digital to analog interface is needed, transferring the time-discrete digital data into a continuous analog format. Usually there is a Digital to Analog Converter (DAC) for signals going from the digital to analog domain, and an Analog to Digital Converter for signals travelling in the opposite direction.
The present invention relates to Integrated Circuit Digital to Analog Converter applications. In a DAC an analog output value is outputted at the converter output that is under control of the digital input value of the DAC. Such converters are for example applied in radio communication devices and generate the voltage input for the modulator in the radio by, e.g. changing the current to output load resistors. Therefore, such a converter is also referred to as an IDAC.
Since the analog output value of a converter is influenced by an internal reference current source of the associated chip which may vary between different chips due to wafer process variations that are inherent to the design of manufacture of CMOS silicon circuits, the said analog output value in practice is not always stable and may be subject to change after chip replacement, since any chip has its own unique reference value.
However, a high degree of accuracy for the DAC analog output is required from chip to chip (stable over temperature and supply changes, independent on transistor parameters of that particular chip, and stable for transistor parameter variation from chip to chip) in order to ensure an excellent operation of the converter.
A chip is a collection of transistor structures with determined circuit properties. Usually the functions on the chip are accessible for external electronic circuit use. The invention is thought to be implemented within a Chip, based upon the usage of a Complimentary Metal Oxide Semiconductor (CMOS) process implemented on a Silicon substrate.
The high accuracy can, in principle, be met in today's Integrated Circuit technology. Such Integrated Circuit technology is known to those skilled in the art and will therefore not be described in detail. However, to achieve such a desired high accuracy in a low cost commercial (i.e. minimum mask level needed for production) digital CMOS IC's processes is very difficult. This is due to the fact that there is large device (i.e. the circuit transistors) parameter variation from chip to chip. By implementing an integrated circuit reference cell this dependency can be solved. However, in general, a high accuracy integrated circuit reference cell providing a stable reference cannot be implemented in a low cost digital CMOS process. The fact that this digital CMOS process is considered low cost is given by the fact that there is a minimum mask set required for device manufacturing (masks are used in the manufacturing process giving way to mass-production, relying on photographic exposure for device fabrication), this in contrast with high accuracy analog processes (e.g. bipolar and CMOS combined) that requires substantial more mask sets. For implementing high accuracy reference cells more complicated device elements are needed, requiring more mask sets (i.e. a more lengthy fabrication process, and likely improved chance for induced errors, lowering the yield and thus increasing the chip price).
There is a need for a low cost, simple circuit structure, integrated circuit reference cell, that forms a stable reference for a DAC and it is therefore an object of the present invention to provide a method and electronic circuitry for providing a stable Digital to Analog converter analog output in Integrated Digital to Analog Converter applications, said output being independent on the associated integrated circuit reference cell.
The invention therefore provides a method for providing a Digital to Analog converter analog output in Integrated Circuit Digital to Analog Converter applications, said analog output being stable over temperature and supply changes, independent on transistor parameters of a particular chip, and stable for transistor parameter variation from chip to chip, comprising: the steps of implementing an integrated circuit reference cell (primary reference quantity); generating an internal (secondary) reference quantity determining the analog Digital to Analog Converter output; referencing the said internal (secondary) reference quantity for the Digital to Analog converter to an chip device specific internal (primary) reference output from the chip in question, and processing further the said chip device specific internal (primary) reference output, in order to derive a fixed predetermined DAC reference value, that is equal for any chip; said fixed predetermined DAC reference value being supplied to the said Digital to Analog converter.
The invention further provides an electronic circuitry for providing a Digital to Analog converter analog output in Integrated Circuit Digital to Analog Converter applications, said analog output being stable over temperature and supply changes, independent on transistor parameters of a particular chip, and stable for transistor parameter variation from chip to chip, comprising an integrated circuit reference cell; means for generating an internal (secondary) reference quantity determining the analog Digital to Analog Converter output; means for referencing the said internal (secondary) reference quantity for the Digital to Analog converter to a chip device specific internal (primary) reference output from the chip in question; means for processing further the said chip device specific internal (primary) reference output, in order to derive a fixed predetermined DAC reference value that is equal for any chip; and means for supplying the said fixed predetermined DAC reference value to the said Digital to Analog converter.
In this manner the internal reference quantity is scaled in such a manner that the DAC converter output gets biased for the required output and a DAC design is achieved with equal characteristics for any chip, wherein the reference source of the chip which advantageously relies on the bare transistor saturation current that varies from batch to batch, and to a lesser extent from chip to chip that do come from the same batch provides a unique scaling-value.
Due to the simple circuit structure the additional die-area (area needed on chip) is minimal, and thus no significant chip price increase is caused by the addition of the DAC converter.
Further there is no need for integration of high accuracy reference sources within the Integrated Circuit (that usually requires a more costly manufacturing process, i.e. more process masks step).


REFERENCES:
patent: 5731772 (1998-03-01), Mikkola et al.
patent: 5790060 (1998-08-01), Tesch
patent: 92117841 (1992-10-01), None
Henriques, B.G. et al “A 10 Bit Low-Power CMOS D/A Converter With On-Chip Gain Error Compensation” “Proceedings Of The Custom Integrated Circuits Conference, Santa Clara, May 1-4, 1995 conf. #7, May 1, 1995” pp. 215-218.
European Search Report, dated Nov. 23, 1998.

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