Method and device to provide a high-performance digital-to-analo

Details Method and device to provide a high-performance digital-to-analo Method and device to provide a high-performance digital-to-analo

1997-11-03

1999-08-03

Young, Brian

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

341148, H03M 166

Patent

active

059331070

ABSTRACT:
High-speed and high accuracy digital-to-analog (D/A) converters find many applications in signal processing. For wideband telecommunication systems, there is a strong demand on high-performance D/A converters. With the design of the present invention it is enabled to prevent distortions and intermodulations for high-speed and high-accuracy digital-to-analog (D/A) converters for telecommunication applications, where the requirements on distortion and intermodulation can be very stringent. By combining segmentation for MSBs and binary weighting for LSBs a high-performance digital-to-analog conversion architecture can be achieved, where a delay for the binary weighted LSBs is used to equalize a delay introduced by segmentation and where all bit switches (14) are clocked with a tree-like-clock distribution network (11). New floor plans for CMOS, BiCMOS and bipolar implementation are thus invented and circuits for CMOS bit switches and current sources are also disclosed.

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PCT International-Type Search Report dated Aug. 19, 1997.
JeanMichel Fournier and Patrice Senn, "A 130-MHZ 8-b CMOS Video DAC for HDTV Applications", IEEE Journal of Solid-State Circuits, vol. 26, No. 7, Jul. 1991, pp. 1073-1077.

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