Boots – shoes – and leggings
Patent
1988-05-10
1991-01-15
Zache, Raulfe B.
Boots, shoes, and leggings
3642624, 364263, G06F 938
Patent
active
049858262
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to a method and a device to execute two instruction sequences in an order determined in advance, the execution of the first and the second sequence, respectively, including selection of read instructions each containing its read address for retrieval of data information stored in one of a plurality of memory locations each accessible by its address in a first and a second separate memory respectively, as well as selection of write instructions each containing its write address and data information for transfering this data information to a separate memory location assigned to the respective sequence and accessible by the write address, the separate memory locations of the sequences being mutually updated with regard to the order and with regard to the selected write instructions, and the data information used in conjunction with the execution of the sequence which is second due to the order not being guaranteed in advance independent of the data information obtained in conjunction with the execution of the sequence which is first due to the order.
DESCRIPTION OF THE RELATED ART
A trivial, conventional solution of the above mentioned information handling problem resides in that the execution of the second sequence, is not started until the execution of the first sequence, is terminated. This trivial solution is obtained as a natural necessity in a data processing system controlled by a single processor such that the sequences are executed one at a time using main memory locations common to both sequences.
It is known to increase data processing capacity by parallel execution of the instruction sequences. As long as the sequences are guaranteed in advance to be mutually independent, fault-free parallel operation is achieved with the aid of so-called pre-processing or multi-processing, or also with the aid of a one-processor processor system which includes at least two data processing units, each of which executes its instruction sequence. It is known to realise information handling both by means of a main memory which is common to a plurality of data processing units and by means of a plurality of separate memories each associated with its data processing unit and mutually updated from time to time.
When there are sensitive instruction sequences which affect each other, and which must therefore be executed in a prescribed order, there is used e.g. according to the journal "Computer Design", Aug. 15, 1985, pp 76-81" or "Balance 8000 System Technical Summary, Sequent Computer Systems, Inc" programming languages, compilators and sequence hardware for parallel processing of mutually independent sequences while parallel processing of the sensitive sequences is prevented.
SUMMARY OF THE INVENTION
As already mentioned in the introduction, the present invention relates to data information processing using two separate memories, each assigned to one sequence. In the proposed information processing, both sequences are executed in parallel without regard to the order determined in advance. The dependence of the second sequence on the first sequence is monitored and the prescribed order is achieved with the aid of an intermiediate storage unit which includes an auxiliary memory and at least one comparison circuit.
Addresses obtained due to read instructions selected during execution of the second sequence are intermediately stored in the auxiliary memory. Every write address selected during the execution of the first sequence is compared with each of the read addresses stored in the auxiliary memory. As long as no duplication of address is determined, no data information dependent on data information obtained during the execution of the first sequence is used during the execution of the second sequence. If it occurs during execution of the second sequence that information has been retrieved from the separate memory location associated with the second sequence, and this information is then corrected by a write operation associated with the first sequence, i.e. i
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Avsan Oleg
Johnson Sten E.
Jonsson Bjorn E. R.
Kling Lars-Orjan
Telefonaktiebolaget L. M. Ericsson
Zache Raulfe B.
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