Method and device for transmission of digital data

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G06F 906

Patent

active

044955731

ABSTRACT:
In a system comprising data-processing units, some of which are masters and others of which are slaves, all the units are connected to a common bus via interface circuits. Only the master units are capable of acquiring instantaneous control of the bus by means of a resource allocation device. By utilizing a set of three basic control signals carried by the bus, three distinct addressing modes can be established: master-to-master, master-to-slave, general master-broadcasting to all units in accordance with a number of chronologies and transmission modes. In an alternative embodiment, substitutions of addresses can be performed directly on the bus.

REFERENCES:
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patent: 3810103 (1974-05-01), Ricci
patent: 4000485 (1976-12-01), Barlow et al.
patent: 4149239 (1979-04-01), Jenkins et al.
patent: 4174536 (1979-11-01), Misunas et al.
patent: 4245306 (1981-01-01), Basemer et al.
de la Logique Cablee Aux Microprocesseurs-Bernard et al., (pp. 136-138).
Integrated Circuits Catalog from Texas Instruments (pp. 168-170).

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