Method and device for transferring noncontiguous blocks in one t

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395844, 395846, 395440, 395404, 364DIG1, 3642451, 3642452, 3642463, 3643515, 364DIG2, 3649521, 3649555, 3649571, 3649602, G06F 1314

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055533078

ABSTRACT:
A disk subsystem provided with a cache has a capability of executing writing of data of discontinuous dirty blocks on a cache memory into a disk and reading of data of discontinuous empty blocks on the cache memory through the effect of just one DMA transfer. When the dirty data discontinuously ranged on a cache segment is written on the disk, the microprocessor provides a bit-map to a harddisk controller (HDC) as control information for data transfer. If an i-th bit of the bit-map is "1", the HDC operates to write the i-th block data sent from a direct memory access controller (DMAC) onto the corresponding sector of the disk. If the i-th bit is "0", the microprocessor serves to stop the write of the data and control a read/write head to wait until it passes the corresponding sector.

REFERENCES:
patent: 5274807 (1993-12-01), Hoshen et al.
patent: 5317713 (1994-05-01), Glassburn
patent: 5353430 (1994-10-01), Lautzenheiser
patent: 5473761 (1995-12-01), Parks et al.
(Japanese article)--"Interface", Jun. 1989; pp. 223-240.
DSO4-25205-1 Fujitsu Semiconductor Device Data Sheet-Hard Disk Controller for Magnetic Disk MB89342A/Mb89342AH.

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