Multiplex communications – Wide area network – Packet switching
Patent
1994-06-10
1996-10-22
Hsu, Alpus H.
Multiplex communications
Wide area network
Packet switching
370 851, 370 953, H04J 302
Patent
active
055684904
ABSTRACT:
A data transfer device for transferring data between a plurality of digital signal processors in a system utilizing time division multiple access techniques. The data transfer device includes a system controller coupled to a bus network, a plurality of dual port random access memories, and a direct memory access controller. Each dual port random access memory device includes a first input/output port coupled to one of the plurality of digital signal processors, and a second input/output port coupled to the bus network. Each of the plurality of digital signal processors can access the dual port random access memory device coupled thereto during a first predefined time within a TDMA cycle. During a second predefined time period within the same TDMA cycle, the direct memory access controller, under control of the system controller, transfers data directly between the dual port random access memory devices. During a third predefined time period within the same TDMA cycle, the system controller can access the dual port random access memory devices coupled thereto.
REFERENCES:
patent: 4972314 (1990-11-01), Getzinger et al.
patent: 5251208 (1993-10-01), Canniff et al.
patent: 5297142 (1994-03-01), Paggeot et al.
patent: 5299189 (1994-03-01), Takahashi
McNinch Wayne
Weaver Chris
Wendling Daniel
Denson-Low Wanda K.
Hsu Alpus H.
Hughes Electronics
Lindeen III Gordon R.
Ngo Ricky
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