Method and device for seamless-decoding video stream...

Television – Bandwidth reduction system – Data rate reduction

Reexamination Certificate

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Details

C375S240280

Reexamination Certificate

active

06633339

ABSTRACT:

TECHNICAL FIELD
This invention relates to decoding apparatuses for seamlessly playing back a video stream comprised of streams having different frame rates and, more specifically, to an apparatus for decoding a digital stream which is a mixture of interlace and progressive streams.
BACKGROUND ART
Satellite digital broadcasting first started in the United State in 1994, then became widespread in Japan and across Europe in 1996, and is now in full-fledged into practical use. Unlike conventional analog broadcasting, digital broadcasting can provide various services, such as high-definition, multi-channel data broadcasting. To achieve such services at broadcasters, great innovations have been introduced to broadcast station systems and receivers. Such new services under consideration include high-definition broadcasting, which is a service inherent in broadcasters, and data broadcasting, which is a new service. By the latter half of 2000, BS digital broadcasting is scheduled to be put in use in Japan.
As one approach toward high-definition, adoption of a progressive scheme prescribed in number 7 of Departmental ordinance of Ministry of Posts and Telecommunications has been considered in national CS (satellite) digital broadcasting. In the progressive scheme, the amount of information is doubled compared with the conventional interlace scheme, and extremely high vertical resolution can be achieved. Moreover, in the progressive scheme, deterioration in image quality associated with interlace operation such as flicker is prevented, and video of high image quality can be achieved.
Most of the existing video contents are created in the interlace scheme. Not all of upcoming video contents will be created in the progressive scheme, but some of them coming early would be created in the interlace scheme, and then gradually many of them will be created in the progressive scheme. Moreover, once created in the interlace scheme, the video content would never be recreated in the progressive scheme unless there is any specific reason.
With such situation, at least for the time being, the broadcasting goes on mostly with the current interlace-scheme, scarcely with progressive-scheme. Such broadcasting is called mixed-scheme-composition, in which a stream in the interlace scheme (hereinafter, “interlace stream IS”) and a stream in the progressive stream (hereinafter, “progressive stream PS”) are mixed in the same program. The ratio of the mixed-scheme-composition will be decreased in the future, but will not disappear for a long while.
This mixed-scheme-composition not only applies to digital broadcasting, but also to equipment that handles MPEG streams such as DVD. That is, a situation is expected to occur where a mixed digital stream comprised of contents created in the interlace scheme and the progressive scheme is recorded on a single DVD and provided. When this DVD is played back, the same situation occurs as in the above-stated digital broadcasting of mixed-scheme-composition.
When the above digital stream broadcasting of mixed programming is viewed or the DVD with the mixed digital stream recorded thereon is played back, the decoding side should correctly support MPEG streams of different frame rates, such as those in the interlace scheme and in the progressive scheme. Otherwise, played-back images will be disrupted at the time of switching of the interlace scheme/progressive scheme, as will be described below with reference to
FIGS. 27 and 28
. In other words, played-back images are not displayed by a unit of frame or field, or displayed incompletely. This causes visually-perceivable discontinuity of screen progress, and makes a viewer feel uncomfortable.
The operation carried out in a conventional video apparatus for decoding the mixed stream changed from the interlace stream IS to the progressive stream PS is shown in FIG.
27
. In the drawing, in image display periods (hereinafter abbreviated as “period” as required for convenience) T
0
to T
4
, an interlace stream IS comprised of a P picture P
9
(period T
0
), a B picture B
7
(period T
2
), and a B picture B
8
(period T
4
) is provided through a bit-stream FIFO to the video decoding apparatus.
Then, in image display periods T
6
to T
11
, a progressive stream PS comprised of an I picture I
0
(period T
6
), a P picture P
3
(period T
7
), a B picture B
1
(period T
8
), a B picture B
2
(period T
9
), a P picture P
6
(period T
10
), and a B picture B
4
(period T
11
) is provided through the bit-stream FIFO to the video decoding apparatus. The operation of the video decoding apparatus in each period is described below.
Note that a suffix “P” added to each picture represents Predictive Picture, “I” represents Intra Picture, and “B” represents Bidirectionally Predictive Picture. A numeral that follows each of the suffixes P, I, and B indicates a display order of that picture.
Each picture data of the interlace stream IS included in the input stream is written in a specified frame memory FMn at the same time when decoding starts in synchronization with a corresponding decode start signal. The decoded picture data written in the frame memory FMn is read therefrom in predetermined timing. In synchronization with a vertical synchronization signal (while a vertical signal is at high level), a bottom field or top field is displayed based on a display parity.
Note that, the P picture and I picture are written in the frame memory FMn, and then read therefrom for display after passing a predetermined time, while the B picture is written in the frame memory FMn and read therefrom at the same time.
Also, similarly to the picture data of the interlace stream IS, picture data of the progressive stream PS included in the input stream is decoded, written in the frame memory FMn, and read therefrom for display. However, what is displayed is not a field but a frame, irrespectively of the display parity. The operation from decoding to displaying the input stream in each image display period is specifically described below.
In the period T
0
, decoded data of a P picture P
6
and a B picture (not shown) included in the interlace stream IS before the period T
0
are written in a frame memory FM
2
and a frame memory FM
3
, respectively. The P picture P
9
is sequentially decoded while being inputted, and written in a frame memory FM
1
.
Then, in synchronization with the vertical synchronization signal for display, and further based on the display parity, the decoded data of the P picture P
6
is read from the frame memory FM
2
, and the bottom field image display starts based on the display parity. Note that, in a conventional example shown herein, the interlace stream is displayed with its bottom field first.
In the period T
1
, after the bottom field image display of the P picture P
6
started in the period T
0
ends, the top field image display of the P picture P
6
starts based on the display parity.
In the period T
2
, the B picture B
7
is sequentially decoded while being inputted, written in the frame memory FM
3
, and then further read and the bottom field image display starts based on the display parity.
In the period T
3
, after the bottom field image display of the B picture B
7
started in the period T
2
ends, the top field image display of the B picture B
7
starts based on the display parity.
In the period T
4
, the B. picture B
8
is sequentially decoded while being inputted, written in the frame memory FM
3
, and then further read and the bottom field image display starts based on the display parity.
In the period T
5
, after the bottom field image display of the B picture B
8
started in the period T
4
ends, the top field image display of the B picture B
8
starts based on the display parity.
In the period T
6
, the I picture I
0
of the progressive stream PS is sequentially decoded while being inputted, and written in the frame memory FM
2
. Simultaneously, the decoded data of the P picture P
9
of the interlace stream IS is read from the frame memory FM
1
, and the bottom field image display starts based on the display parity.
In

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