Data processing: generic control systems or specific application – Generic control system – apparatus or process – Plural processors
Reexamination Certificate
2002-04-17
2004-06-01
Grant, William (Department: 2127)
Data processing: generic control systems or specific application
Generic control system, apparatus or process
Plural processors
C700S004000, C700S021000, C700S079000
Reexamination Certificate
active
06745083
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method for safely monitoring a speed of an electric machine with a system having two processors which cross-compare results and are connected to each other via a communication link. The present invention also relates to a device for carrying out the method.
A conventional method for monitoring the speed limit of an electric machine requires a transducer to not only control the rotation speed, but also to monitor the rotation speed. A conventional device of this type is illustrated in
FIG. 3. A
processor
1
operates as a controller
11
which receives as input values nominal values
5
and controls a machine
7
(in this example a three-phase machine) via a pulse generator
9
and a converter
8
. Corresponding actual values derived from the phase current are returned to the controller
11
. Transducer signals are supplied by the transducer
27
via a connected transducer processing circuit
28
to the controller
11
as well as to an additional unit
29
for fault detection. The controller also supplies values to the unit
29
. The occurrence of only one fault—namely a malfunction of the controller
11
or the transducer
27
—can be detected based on an inconsistency between the data from the transducer and the data from the controller.
However, if the drive is to be operated without a transducer, then the situation becomes more complex (see FIG.
4
). One conventional approach involves the use of two identical structures which are supplied with identical input data, and the process data and the results are cross-compared. As shown in
FIG. 4
, nominal values
5
are supplied simultaneously to both the processor
1
, which includes the controller
11
, and to a second processor
2
, which includes an additional controller
30
. The data are cross-compared via a communication link
19
connecting the two processors
1
and
2
. Pulse generators
9
and
31
generate control signals, which are supplied to an input of a unit
32
for performing logical operations and identifying deviations. The entire control set is here implemented in redundant from, the two resulting sets of control signals for the transistors of the converter
8
are logically combined and thereby tested for faults. The transistors are controlled only by the signals of the first control set and/or the first pulse generator
9
. The converter controls the machine
7
by returning to the controller
11
corresponding actual values derived from the phase currents.
A malfunction in the aforedescribed system can be identified with this method. However, problems that arise from pulling loads cannot be managed in this manner.
It would therefore be desirable and advantageous to provide an improved process which obviates prior art shortcomings and is able to safely reduce a speed of an electric machine.
It would also be desirable and advantageous to provide an improved process to recognize the fault and to safely switch off the drive.
In the following description, the term “safely” is to be understood to satisfy the “single-error-safety” principle, wherein the process continuously performs a self-check and irreversibly disconnects or disables the system when a single error or a critical fault is detected. In the present example, a predetermined speed limit value must not be exceeded even in the event of a single fault in the system.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, a method for monitoring a speed of an electric machine with two processors, includes the steps of connecting a first of the two processors with the second processor via a communication link; monitoring the speed in a first checking mode using the first processor; monitoring the speed in a second checking mode using the second processor, wherein the first and second checking modes are different; and cross-comparing results derived by the first and second processor.
The present invention solves prior art shortcomings by providing a system with two processors to safely monitor the speed of an electric machine and to cross-compares the results, wherein the two processors are connected via a communication link and monitor the operation in a different manner.
According to another feature of the present invention, a first one of the processors may execute a conventional control algorithm and monitor based on an estimated or measured rotation speed value if the rotation speed exceeds a limit value and /or initiates response actions if this limit value is exceeded, whereas the second one of the processors determines the actual output frequency of an associated converter using the actual current values and, like the first processor, monitors a limit value and/or initiates corresponding response actions, if this limit value is exceeded.
Suitably, the output frequency may be determined by defining a current vector from at least two measured phase currents. The actual output frequency is determined by computing the time derivative of the angle of the current vector. The angle signal is advantageously low-pass filtered before the time derivative is computed.
As an alternative, the first processor may execute a conventional control algorithm and monitor based on an estimated or measured rotation speed value if the rotation speed limit is actually exceeded and/or initiates corresponding response actions, whereas the second processor may determine the actual output frequency of an associated converter reconstructing the voltage of the control signals of the system, and like the first processor monitors if a limit value is exceeded and/or initiates corresponding response actions. In this case, the voltage of control signals of the system can be reconstructed by suitable filtering, in particular by filtering with a P-T1 element that has a cutoff frequency which is greater than the maximum output frequency, but less than the pulse repetition frequency of the converter.
Suitably, the control signals are evaluated by only two current valves, e.g. transistors, located in different branches of a bridge circuit of the converter. Of course, the control signals may also be evaluated by more than two transistors.
The speed of a synchronous machine can be safely monitored by assuming that the actual rotation speed is equal to the measured output frequency and by switching off the converter, when excessively high compensating currents indicate that the machine is out of synchronization. To safely monitor the speed of an asynchronous machine in generator operation, the asynchronous machine can be designed so that torque accompanying a pulling load can still be controlled, even when the asynchronous machine, that may be designed for three phases, operates with less than three phases, for example, only with two phases.
It has been found beneficial in all cases when a nominal value of the rotation speed is limited to a predetermined limit value by the first and second processor on dual channels.
According to another feature of the present invention, the two processors operate with an identical time base. Pulse generators in both processors generate pulse signals which are supplied to the respective other processor for comparison with a nominal pulse signal value, whereby the machine is safely stopped in the event of a discrepancy, in particular when the discrepancy is greater than a predetermined tolerance threshold.
According to another aspect of the present invention, a device for safely monitoring a speed includes a system of two processors which are connected via a communication link so that the process results can be cross-compared, whereby the first and second processor are so programmed as to perform the monitoring process in different checking modes.
According to another feature of the present invention, the first processor may execute a conventional control algorithm and the rotation speed can be monitored based on an estimated or measured value to detect an excess rotation speed, whereas the second processor may determine an actual output frequency of a converter of the syst
Eckardt Dieter
Rebbereh Carsten
Feiereisen Henry M.
Grant William
Hartman Jr. Ronald D
Siemens Aktiengesellschaft
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