Method and device for reducing scheduling delay in a digital...

Details Method and device for reducing scheduling delay in a digital... Method and device for reducing scheduling delay in a digital...

2008-05-27

2008-05-27

Dorvil, Richemond (Department: 2626)

Data processing: speech signal processing, linguistics, language

Speech signal processing

For storage or transmission

C370S328000, C370S348000, C455S450000, C455S452100, C704S500000, C704S227000

Reexamination Certificate

active

10409961

ABSTRACT:
A method and device within a speech processing unit (SPU) for reducing scheduling delay between the SPU and a radio network node. Within the SPU, data packets are processed in a plurality of time slots that are subunits of frames. The device receives timing information from the node that identifies a beginning and an ending of processing periods in the node. The timing information is utilized to select a time slot within each frame as a target time slot. The target time slot has a position within each frame such that the scheduling delay between the ending of a processing period in the node and the beginning of the target time slot is minimized. Data packets for a particular channel are assigned to the target time slot to reduce the scheduling delay. The phase of the frame is then adjusted by erasing superfluous data packets.

REFERENCES:
patent: 5914950 (1999-06-01), Tiedemann et al.
patent: 6205125 (2001-03-01), Proctor et al.
patent: 7164919 (2007-01-01), Chen
patent: 2002/0055356 (2002-05-01), Dulin et al.
patent: 2003/0100314 (2003-05-01), Czaja et al.

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