Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels
Reexamination Certificate
2000-08-24
2004-10-26
Olms, Douglas (Department: 2661)
Multiplex communications
Communication techniques for information carried in plural...
Combining or distributing information via time channels
C353S082000
Reexamination Certificate
active
06810045
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a method and a device for processing data packets which have been received or are to be transmitted on a data channel and which in particular contain time-critical data, so that the checking of the up-to-dateness of the data packet is highly significant.
BACKGROUND OF THE INVENTION
The invention is based on method for processing data packets which have been received or are to be transmitted on a data channel of the generic type of the independent Claim
1
.
The term multimedia is used to refer to the current growing together of the product sectors of consumer electronics (hi-fi, video, audio) and personal computing, and many manufacturers from both sides are even pushing ahead with actual products. The fusion of the two product sectors means that work concerning the exchange of data between the pieces of equipment from the different product sectors is becoming more and more significant. This is also apparent from the efforts of standardization in this sector, which are already well advanced. In particular, the so-called IEEE 1394 Serial Bus is an internationally standardized and very widely accepted bus for data exchange between terminals from both product groups which is already available. The precise designation of the aforesaid standard is: IEEE Standard for High Performance Serial Bus, (IEEE Std 1394-1995, IEEE, New York, August 1996). The specification of the IEEE 1394 Serial Bus comprises a series of criteria which are highly significant for products from the sector of consumer electronics:
Virtually freely selectable bus topology (for example, chain, tree . . . ) with up to 63 terminals,
bit-serial data transmission over a cable with 4 or 6 conductors with a maximum distance of 4.5 metres between two pieces of equipment,
transmission rates of up to 400 Mbit/s at present,
terminals can be connected and disconnected during operation.
In order to produce an IEEE 1394 interface it is necessary to implement two layers of the IEEE 1394 Standard using hardware: these are the physical layer and link layer which are known from the ISO/IEC-7-layer model. The connection to the bus is managed with the physical layer, while essential parts of the bus protocol are implemented in the link layer. Since a galvanic separation between the physical layer and the link layer is provided in the IEEE 1394 Standard, the implementation is generally effected using separate ICs.
When data are transmitted from the piece of consumer electronics equipment to another piece of equipment, an isochronous data transfer takes place in which a quantity of data have to be transmitted on a regular basis under real-time conditions, since the corresponding application of the data proceeds without faults only if the data have arrived at the correct time and can correspondingly also be processed correctly. Therefore, a special standard has been developed for the exchange of such data. This standard is known under the designation IEC-61883 (Consumer Audio/Video Equipment-Digital Interface). The precise designation of this standard is: IEC-61883-1: Consumer Audio/Video Equipment-Digital Interface (Draft) IEC., September 1997. In it there is provision for data packets to be provided with a so-called time stamp. This time stamp relates to the bus time of the IEEE 1394 Serial Bus and specifies the precise time at which a data packet is to be output to the application via the bus after the transmission. For the production of a link layer IC with implemented IEC 61883 functionality this means that a series of additional functions have to be implemented. In particular, these are:
The time stamp is generated during the transfer of the packet to the link layer IC,
the time stamp is checked before the transmission of the packet via the IEEE 1394 Serial Bus (“late check” during the transmission of packets),
the received packet is output to an application (“late check” during the reception of packets) under the control of time stamps.
Here, the generation of the time stamps is the simplest of the three enumerated tasks. This task can be achieved by simply adding an offset to the IEEE 1394 bus time which is available on a standard basis in the link layer IC. The current time stamp is then formed for a packet to be sent, and is stored, in addition to the data of the packet, in the memory of the link layer control IC.
The checking of the time stamp of a packet located in the memory, before the transmission over the IEEE 1394 Serial Bus, or secondly after the reception before the data packet is output to the application, is significantly more complex. The purpose of the first check is that a packet which can no longer reach the destination system at the correct time owing to the delay during the processing of previous packets is no longer output onto the IEEE 1394 Serial Bus. This would only load the bus unnecessarily. The second check brings about synchronization of the received data packets before they are output to the application.
The implementation of the two last mentioned checks gives rise to a considerable portion of the hardware complexity of the complete link layer IC.
SUMMARY OF THE INVENTION
Taking the abovementioned prior art as a starting point, the object of the invention is to specify a method and a device for processing data packets which have been received or are to be transmitted on a data channel, which method in particular reduces the costs for the implementation of the circuit unit which performs the checking of the up-to-dateness of the data packets, and operates reliably.
The part of the object which is directed to the method is achieved according to the invention by the measures which are given in Claim
1
. The specified solution makes it possible to implement a single module which can carry out both of the previously explained checks in the time-division multiplex mode. One and the same unit is used for the aforesaid checking during the reception and transmission of data packets. A significant aspect of the invention consists in the fact that at the time of checking the up-to-dateness of a data packet, in both types of check initially the current system time (bus time) is determined and, on the basis of this time, the time axis is divided into at least the “correctly timed” and “delayed” regions, and a check is then made to determine the region in which the processing time (time stamp) entered in the data packet lies. The advantage of this solution consists in the fact that the implementation for the circuit part or the module which has to perform the previously explained checks of the time stamps requires significantly less expenditure on hardware than is the case in a solution in which the time axis is not divided into regions and the time stamps of the data packets of an isochronous data transmission have to be checked by means of a large number of individual comparisons in conjunction with additions and subtractions as well as considerations of limiting values with intermediate storage steps.
This is mainly due to the fact that for a real system it is not possible to represent the time (bus time of the IEEE 1394 Serial Bus) from zero to infinity, but rather the time is represented by a limited number of bits (namely 25 bits) according to the IEC 61883 Standard. When a timing clock of 25 MHz is used, the time period which can be represented with 25 bits is only one second. The bus time must therefore continually be reset and updated. During the transmission of isochronous data over the bus, the application in the piece of equipment which is operating as transmitter will assign to each data packet a time stamp which is projected into the future relative to the current bus time, the offset having been determined in such a way that the transmission time which is necessary in all probability is taken into account and the data packet nevertheless still arrives early enough at the receiver. However, the signal processing or even excessively high bus loading may give rise to delays. For this reason, checking of the time stamp in terms of the up-to-dateness of
Brune Thomas
Gaedke Klaus
Schweidler Siegfried
Kiel Paul P.
Nguyen Van
Olms Douglas
Thomson Licensing S.A.
Tripoli Joseph S.
LandOfFree
Method and device for processing data packets which have... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and device for processing data packets which have..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and device for processing data packets which have... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3271062