Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating
Reexamination Certificate
2005-10-04
2005-10-04
Pwu, Jeffrey (Department: 2143)
Electrical computers and digital processing systems: multicomput
Computer-to-computer protocol implementing
Computer-to-computer data transfer regulating
C710S056000, C710S058000, C710S059000, C370S230000, C370S235000
Reexamination Certificate
active
06952739
ABSTRACT:
A method and device for parameter independent buffer underrun prevention in a data communication system includes a buffer for compensating for a difference in the rate of flow of data having a write port and a read port. After a commencement of writing data into the buffer, a predetermined delay time occurs. When the delay time has passed, reading data out from the buffer starts. Then the length of a time gap between the completion of writing data into the buffer and completion of reading data out from the buffer is determined. Finally, the length of the predetermined delay time is decreased by a first value if the length of the time gap is larger than a specified tolerance value and the length of the predetermined delay time is increased by a second value if the length of the time gap is smaller than the specified tolerance value. The provided method and device advantageously adjusts to systems having dynamically varying parameters, e.g., processors or other devices having a variable clock rate due to power-saving-modes.
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Fritz Rolf
Helms Markus Michael
Augspurger Lynn L.
Murray James E.
Pwu Jeffrey
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