Method and device for minimizing multi-layer microscopic and...

Details Method and device for minimizing multi-layer microscopic and... Method and device for minimizing multi-layer microscopic and...

2005-04-19

2005-04-19

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Including control responsive to sensed condition

Optical characteristic sensed

C438S013000, C438S018000, C438S401000

Reexamination Certificate

active

06881592

ABSTRACT:
A method of aligning a second layer to a first layer of a semiconductor structure by forming a first layer of a wafer having a distinguished feature via a first etching process that employs a first ionized gas generating machine. Forming a second layer having a circuit pattern via a second etching process that employs a second ionized gas generating machine, wherein the forming the second layer includes minimizing relative shifting between the distinguished feature located at an edge of the wafer for the first layer and the second circuit pattern located at the edge of the wafer for the second layer.

REFERENCES:
patent: 20020142511 (2002-10-01), Okayama et al.
patent: 20020180067 (2002-12-01), Hoshi et al.
patent: 20020186359 (2002-12-01), Meisburger et al.
patent: 20030211757 (2003-11-01), Gondhalekar et al.

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