Method and device for high speed scale conversion

Details Method and device for high speed scale conversion Method and device for high speed scale conversion

1999-05-21

2002-09-03

Malzahn, David H. (Department: 2121)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C341S096000

Reexamination Certificate

active

06446102

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method and device for performing high speed scale conversion from one numerical value to another, smaller numerical value.
BACKGROUND OF THE INVENTION
In automation and other numerical control applications, it is usually required to convert an input value to an output value. This scaling process is required to be carried out in a very short time, without the support of a fast computation means such as a computer. For example, the one scaling scheme of interest is to convert input values in the range of 8000 to 40000 into output values in the range of 0 to 4095. It is preferred that the entire conversion process is achieved within 0.1 millisecond. At the same time, the cost to manufacture the conversion module is required to be low. The cost constraint requires that the hardware is limited to the use of a single A/D converter, and no numeral hardware support to do the scale conversion.
It is, therefore, desirable to provide a low cost method and device for high speed scale conversion wherein the errors are at sufficiently low levels.
SUMMARY OF THE INVENTION
It is an objective of the present invention to provide a method and a device to perform high speed scale conversion without using costly electronic components. This objective can be achieved by performing an approximate division of the input digital data, followed by providing a correction to the approximate result. In particular, the approximate division is carried out by right-shifting of the contents in a multi-bit shift-register, and the correction is made by a binary search process.
The method of high speed scale conversion, according to the present invention, converts an input data having a value N in the range of N1 to N2 to an output data having a value M in the range of M1 to M2, where M, N, M1, M2, N1 and N2 are positive integers, and includes the steps of:
1) determining a positive integer p such that
|
q−
2
p
|<|q−
2
p−1
|
 and
|
q−
2
p−1
|≦|q−
2
P+1
|,
 where q=(N2−N1)/(M2−M1);
2) loading the value V(N)=(N−N1+2
p−1
) onto a multi-bit shift register and right-shifting the contents of the shift register (toward the least-significant bit) by p bits to obtain a reduced value A(N);
3) obtaining an error value E(N) from a binary search process; and
4) obtaining the value M from
M=A
(
N
)+
M
1+
E
(
N
).
 wherein the binary search process includes the steps of:
I) obtaining an integer D such that
D=R{
(
N
2−
N
1)*|(1/
q−
1/2
p
)|}
 where R{x} is the rounded off value of x (e.g. R{2.57}=3 and R{2.49}=2);
II) establishing a list of correction values C(n) for n=0 to n=D, such that
C
(
n
)=
R{(
2
n−l
)*
Q}
 where
Q=
(
N
2−
N
1)/2
D;
 and
III) assigning E(N)=m, where
C
(
m
)≦(
N−N
1)<
C
(
m+
1)
It should be noted that, for simplicity, it is possible to use the value V(N)=(N−N1), instead of V(N)=(N−N1+2
p−1
), in Step 2.
The above-described method will be easier to appreciate with the following explanation.
When a value N within a range of N1 to N2 is required to be converted to a value M within a smaller range of M1 to M2, the usual way would be to calculate M according to the following equation:
M=R
{(
N−N
1)*(1/
q
)}+
M
1
or
M−M
1=
R{
(
N−N
1)*(1
/q
)}
The usual way of converting N to M involves actual multiplication of two numbers, namely (N−N1) and 1/q, which requires supporting hardware and/or a lengthy computation time. Alternatively, the value of (M−M1) can be crudely approximated from (N−N1)/2
p
and an error value is added to or subtracted from the approximate value to correct for the discrepancies. The approximate value can be obtained by loading the value of (N−N1) onto a multi-bit shift-register and right-shifting the contents of the shift register by p bits. This approximation leads to an error approximately equal to:
 
E
(
N
)=(
N−N
1)*|(1
/q−
1/2
p
)|
In the digital process, E(N) is approximately equal to
E
(
N
)=
R{
(
N−N
1)*|(1
/q−
1/2
p
)|}
It should be noted that when N=N1, there is no error and therefore E(N1)=0. When N=N2, the error is largest and approximately equal to:
E
(
N
2)=
R{
(
N
2−
N
1)*|(1
/q−
1/2
p
)|}=D
For the purpose of estimating the error value E(N) for any value N without actual multiplication, a binary search process can be used to obtain an approximate value of E(N). To facilitate the binary search process, the input data range (N2−N1) is partitioned into D approximately equal sections. Each of the D sections is denoted by an index number n, from n=0 to n=D, such that each section n is bounded by C(n) and C(n+1), where C(n) is approximately equal to (n/D)(N2−N1). However, in order to minimize the errors resulting from rounding off decimal numbers, it is preferred that the range is partitioned into D+1 sections and C(n) is computed according to
C
(
n
)=
R{
(2
n−
1)*
Q}
where
Q=
(
N
2
−N
1)/2
D
The goal of a binary search is to locate the section that contains the value (N−N2). In other words, the search is to locate the mth section where
C
(
m
)≦(
N−N
1)<
C
(
m+
1)
and to assign the error value for N such that E(N)=m.
Furthermore, in order to reduce the discrepancies between this approximation method and the actual multiplication, it is desirable to load the value of (N−N1+2
p−1
), instead of (N−N1), onto the shift-register. This is due to the fact that, after right-shifting, the value behind the decimal point will be lost regardless of its magnitude. For example, if the value N−N1=15 is loaded into the shift register and right-shifted 3 bits, the result is 1 even though 15/8=1.875. It is different from the rounded off value of 1.875 which is 2. Therefore, it is preferable to load the value (N−N1+4) into the shift register instead of N−N1.
With all the values of C(n) being pre-calculated and electronically stored, the binary search process starts at level 1 to compare the value Z(=N−N1) with C(K) where K is the middle index number between 0 and D+1 to determine which half (approximately) of the input data range (N2-N1) contains the value Z. After knowing which half of the range (N2-N1) contains the value Z, the next search will be carried out only in that half of the range. Thus, in level 2, the search range is reduced to approximately half, and the goal is to determine which quarter (approximately) of the range (N2-N1) contains the value Z. Thus, at the next level, the search range is further reduced to approximately one quarter of the range. The search continues in a similar fashion until the section in which the value Z falls is finally identified.
The major advantages of binary search are that it usually requires only a small number of search steps to obtain the error value E(N) for a given N, and that the search process can be implemented on relatively inexpensive electronic components such as microprocessors. If D is less than or equal to (2
k
−1), the binary search will take at most k steps to complete.
With the method of scale conversion, according to the present invention, the total conversion time is the sum of (1) the time required for subtracting N1 (or preferably N1−2
p−1
) from N, (2) the time required for loading the value (N−N1), or preferably (N−N1+2
p−1
), into the shift register and right-shifting the register, (3) the total number of steps in the binary search, which is equal to

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