Method and device for generating an output signal as a...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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10321829

ABSTRACT:
A device (1) for generating a digital output signal yLOG(k)/K) as a mathematical function of a digital input signal (xLOG(k)) includes a level-changing device (6), which by amplifying or attenuating the input signal (xLOG(k)) generates a first intermediate signal (A) that falls within a compressed argument range of the mathematical function and a correction signal (shiftLOG) dependent on the amplification or attenuation of the input signal (xLOG(k)). Tabulated function values of the mathematical function are stored at or between indices in a storage device (11). The tabulated function values (B1) are read from the storage device (11) in dependence on the first intermediate signal (A), and a second intermediate signal (B) is generated in dependence on the read tabulated function values (B1). The correction signal (shiftLOG) is subtracted from the second intermediate signal (B) in a subtractor (12) to yield the digital output signal yLOG(k)/K).

REFERENCES:
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patent: 5359551 (1994-10-01), Pickett
patent: 5524089 (1996-06-01), Takano
patent: 5600581 (1997-02-01), Dworkin et al.
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patent: 5642305 (1997-06-01), Pan et al.
patent: 5831878 (1998-11-01), Ishida
patent: 5951629 (1999-09-01), Wertheim et al.
patent: 6289367 (2001-09-01), Allred
patent: WO 96/24094 (1996-08-01), None

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